MCF5407AI220 Freescale Semiconductor, MCF5407AI220 Datasheet - Page 367

• Manufacturer Part Number: MCF5407AI220
• Description: IC MPU 32B 220MHZ COLDF 208-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF540xr

Specifications of MCF5407AI220

• Core Processor: Coldfire V4
• Core Size: 32-Bit
• Speed: 220MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 208-FQFP
• Maximum Clock Frequency: 220 MHz
• Operating Supply Voltage: 1.8 V, 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Program Memory Size: 24KB
• Cpu Speed: 220MHz
• Embedded Interface Type: I2C, UART
• Digital Ic Case Style: FQFP
• No. Of Pins: 208
• Supply Voltage Range: 3.3V
• Rohs Compliant: Yes
• For Use With: M5407C3 - KIT EVAL FOR MCF5407 W/ETHERNET
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Let baud rate = 9600; the divider can be calculated as follows:
Therefore UDUn = 0x00 and UDLn = 0xB0.
14.5.1.2.2 External Clock
An external source clock (TIN) can be used as is or divided by 16.
14.5.2 Transmitter and Receiver Operating Modes
Figure 14-29 is a functional block diagram of the transmitter and receiver showing the
command and operating registers, which are described generally in the following sections
and described in detail in Section 14.3, “Register Descriptions.”
Transmitter Buffer
(2 Registers)
(UTB0)
UART
Figure 14-29. Transmitter and Receiver Functional Diagram
UART Receive
Buffer (URB0)
(4 Registers)
Divider
Receiver Holding Register 1
UART Command Register (UCR0)
UART Mode Register 1 (UMR1)
UART Mode Register 2 (UMR2)
UART Status Register (USR0)
Transmitter Holding Register
Baudrate
Receiver Holding Register 2
Transmitter Shift Register
Chapter 14. UART Modules
=
---------------------------- -
[
Receiver Holding Register 3
Baudrate
32 9600
54MHz
×
UART0
Receiver Shift Register
=
Externalclockfrequency
-------------------------------------------------------------------- -
]
=
=
----------------------------------- -
[
32 divider
176 decimal
54MHz
×
16or1
(
]
)
=
0x00B0
R/W
R/W
R
W
W
R
FIFO (32-byte
FIFOs on
UART1)
Operation
External
Interface
14-25
RXD
TXD