MT47H64M8CB-3:B Micron Technology Inc, MT47H64M8CB-3:B Datasheet - Page 61

• Manufacturer Part Number: MT47H64M8CB-3:B
• Description: IC DDR2 SDRAM 512MBIT 3NS 60FBGA
• Manufacturer: Micron Technology Inc

Specifications of MT47H64M8CB-3:B

• Format - Memory: RAM
• Memory Type: DDR2 SDRAM
• Memory Size: 512M (64M x 8)
• Speed: 3ns
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 60-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Self Refresh
SELF REFRESH Command
PDF: 09005aef8117c18e, Source: 09005aef8211b2e6
512MbDDR2_2.fm - Rev. K 8/06 EN
The SELF REFRESH command can be used to retain data in the DDR2 SDRAM, even if
the rest of the system is powered down. When in the self refresh mode, the DDR2
SDRAM retains data without external clocking. All power supply inputs (including V
must be maintained at valid levels upon entry/exit and during SELF REFRESH opera-
tion.
The SELF REFRESH command is initiated like a REFRESH command except CKE is LOW.
The DLL is automatically disabled upon entering self refresh and is automatically
enabled upon exiting self refresh (200 clock cycles must then occur before a READ
command can be issued). The differential clock should remain stable and meet
specifications at least 1 x
input signals except CKE are “Don’t Care” during self refresh.
The procedure for exiting self refresh requires a sequence of commands. First, the differ-
ential clock must be stable and meet
going back HIGH. Once CKE is HIGH (
registrations), the DDR2 SDRAM must have NOP or DESELECT commands issued for
t
simple algorithm for meeting both refresh and DLL requirements is to apply NOP or
DESELECT commands for 200 clock cycles before applying any other command.
XSNR because time is required for the completion of any internal refresh in progress. A
t
CK after entering self refresh mode. All command and address
61
t
CK specifications at least 1 x
t
Micron Technology, Inc., reserves the right to change products or specifications without notice.
CKE [MIN] has been satisfied with four clock
512Mb: x4, x8, x16 DDR2 SDRAM
©2004 Micron Technology, Inc. All rights reserved.
t
CK prior to CKE
Self Refresh
t
CKE
REF
)