MT47H64M8CB-3:B Micron Technology Inc, MT47H64M8CB-3:B Datasheet - Page 58

• Manufacturer Part Number: MT47H64M8CB-3:B
• Description: IC DDR2 SDRAM 512MBIT 3NS 60FBGA
• Manufacturer: Micron Technology Inc

Specifications of MT47H64M8CB-3:B

• Format - Memory: RAM
• Memory Type: DDR2 SDRAM
• Memory Size: 512M (64M x 8)
• Speed: 3ns
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 60-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 40:
PDF: 09005aef8117c18e, Source: 09005aef8211b2e6
512MbDDR2_2.fm - Rev. K 8/06 EN
COMMAND
DQS, DQS#
ADDRESS
BA0, BA1
CK#
CKE
A10
DQ
DM
CK
5
1
NOP
T0
WRITE – DM Operation
6
Notes:
Bank x
ACT
RA
RA
T1
t CK
10. Subsequent rising DQS signals must align to the clock within
1. DI n = data-in from column n; subsequent elements are applied in the programmed order.
2. Burst length = 4, AL = 1, and WL = 2 in the case shown.
3. Disable auto precharge.
4. “Don’t Care” if A10 is HIGH at T11.
5. PRE = PRECHARGE, ACT = ACTIVE, RA = row address, BA = bank address.
6. NOP commands are shown for ease of illustration; other commands may be valid at these
7.
8.
9.
t RCD
t RAS
NOP
T2
times.
t
t
t
DSH is applicable during
DSS is applicable during
WR starts at the end of the data burst regardless of the data mask condition.
t CH t CL
6
Bank x
WRITE
Col n
3
T3
2
AL = 1
NOP
T4
6
WL ± t DQSS (NOM)
t
t
DQSS (MAX) and is referenced from CK T7 or T8.
DQSS (MIN) and is referenced from CK T6 or T7.
WL = 2
NOP
T5
58
6
t WPRE
NOP
T6
DI
n
Micron Technology, Inc., reserves the right to change products or specifications without notice.
6
T6n
t DQSL t DQSH t WPST
10
512Mb: x4, x8, x16 DDR2 SDRAM
NOP
T7
6
T7n
NOP
T8
TRANSITIONING DATA
6
t
DQSS.
©2004 Micron Technology, Inc. All rights reserved.
t WR 9
NOP
T9
6
T10
NOP
6
ALL BANKS
ONE BANK
DON’T CARE
WRITEs
Bank x
T11
PRE
t RP A
4