PNX1700EH,557 NXP Semiconductors, PNX1700EH,557 Datasheet - Page 796
PNX1700EH,557
Manufacturer Part Number
PNX1700EH,557
Description
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1700EH557.pdf
(832 pages)
Specifications of PNX1700EH,557
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
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Philips Semiconductors
Volume 1 of 1
PNX17XX_SER_1
Preliminary data sheet
Figure 4:
31
31
32-Bit/Pixel Packed Formats
alpha
alpha
alpha
alpha
memory address A
left-most pixel
3.4 Packed YUV 4:2:2 Formats
24
24
32-bit formats are accepted and produced by all units except the MPEG-2 decoder.
Packed YUV 4:2:2 formats store two horizontally adjacent pixels into two 16-bit units.
Each pixel has an individual luminance (Y1 for the left of the pair, Y2 for the right of
the pair). There is a single U and V value associated with the pair. The U and V
values are taken from the same spatial position as the Y1 sample
There are two variants of packed YUV 4:2:2: the Microsoft ‘UYVY’ format and the
Microsoft ‘YUY2’ format. The big-endian view of the YUY2 format is identical to the
Power MacIntosh ‘2vuy’ format.
Figure 5
successive 16-bit units contain a pair of pixels. This view is independent of system
endian mode.
23
23
Figure 5:
left-most pixel pair, 1st unit
memory address A
and
R
V
R
R
UYVY Packed YUV 4:2:2 Format
Figure 6
memory address A+4
next pixel
Rev. 1 — 17 March 2006
16
16
show the software view of UYVY and YUY2/2vuy. Two
15
15
1st unit
2nd unit
left-most pixel pair, 2nd unit
memory address A+2
G
G
Y
G
15
31
. . . . . .
8
8
Y1
Y2
7
7
memory address A+4k
right-most pixel
. . . . . .
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
32-bit word
1 byte
Chapter 28: Pixel Formats
PNX17xx Series
B
U
8
24
right-most pixel pair, 2nd unit
7
23
memory address A+4k+2
(Figure
16-bit word
1 byte
0
0
YUVa 444
RGBa 8888
U
V
7).
UYVY
28-5
0
16
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