MC9S08SH4CTG Freescale, MC9S08SH4CTG Datasheet - Page 94

MC9S08SH4CTG

Manufacturer Part Number
MC9S08SH4CTG
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S08SH4CTG

Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
I2C/SCI/SPI
Total Internal Ram Size
256Byte
# I/os (max)
13
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
16
Package Type
TSSOP
Program Memory Type
Flash
Program Memory Size
4KB
Lead Free Status / RoHS Status
Compliant

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Chapter 7 Central Processor Unit (S08CPUV2)
7.2
Figure 7-1
7.2.1
The A accumulator is a general-purpose 8-bit register. One operand input to the arithmetic logic unit
(ALU) is connected to the accumulator and the ALU results are often stored into the A accumulator after
arithmetic and logical operations. The accumulator can be loaded from memory using various addressing
modes to specify the address where the loaded data comes from, or the contents of A can be stored to
memory using various addressing modes to specify the address where data from A will be stored.
Reset has no effect on the contents of the A accumulator.
7.2.2
This 16-bit register is actually two separate 8-bit registers (H and X), which often work together as a 16-bit
address pointer where H holds the upper byte of an address and X holds the lower byte of the address. All
indexed addressing mode instructions use the full 16-bit value in H:X as an index reference pointer;
however, for compatibility with the earlier M68HC05 Family, some instructions operate only on the
low-order 8-bit half (X).
Many instructions treat X as a second general-purpose 8-bit register that can be used to hold 8-bit data
values. X can be cleared, incremented, decremented, complemented, negated, shifted, or rotated. Transfer
instructions allow data to be transferred from A or transferred to A where arithmetic and logical operations
can then be performed.
For compatibility with the earlier M68HC05 Family, H is forced to 0x00 during reset. Reset has no effect
on the contents of X.
94
Programmer’s Model and CPU Registers
shows the five CPU registers. CPU registers are not part of the memory map.
Accumulator (A)
Index Register (H:X)
H
CONDITION CODE REGISTER
15
15
INDEX REGISTER (HIGH)
16-BIT INDEX REGISTER H:X
MC9S08SH8 MCU Series Data Sheet, Rev. 3
PROGRAM COUNTER
STACK POINTER
Figure 7-1. CPU Registers
8
V 1 1 H I N Z
7
7
7
INDEX REGISTER (LOW)
ACCUMULATOR
0
0
0
0
C
CARRY
ZERO
NEGATIVE
INTERRUPT MASK
HALF-CARRY (FROM BIT 3)
TWO’S COMPLEMENT OVERFLOW
SP
PC
CCR
A
X
Freescale Semiconductor

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