MC9S08SH4CTG Freescale, MC9S08SH4CTG Datasheet - Page 180

• Manufacturer Part Number: MC9S08SH4CTG
• Manufacturer: Freescale

Specifications of MC9S08SH4CTG

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: I2C/SCI/SPI
• Total Internal Ram Size: 256Byte
• # I/os (max): 13
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 16
• Package Type: TSSOP
• Program Memory Type: Flash
• Program Memory Size: 4KB
• Lead Free Status / RoHS Status: Compliant

Chapter 11 Inter-Integrated Circuit (S08IICV2)
11.7
180
1.
2.
3.
4.
5.
1.
2.
3.
4.
5.
6.
7.
Write: IICC2
— to enable or disable general call
— to select 10-bit or 7-bit addressing mode
Write: IICA
— to set the slave address
Write: IICC1
— to enable IIC and interrupts
Initialize RAM variables (IICEN = 1 and IICIE = 1) for transmit data
Initialize RAM variables used to achieve the routine shown in
Write: IICF
— to set the IIC baud rate (example provided in this chapter)
Write: IICC1
— to enable IIC and interrupts
Initialize RAM variables (IICEN = 1 and IICIE = 1) for transmit data
Initialize RAM variables used to achieve the routine shown in
Write: IICC1
— to enable TX
Write: IICC1
— to enable MST (master mode)
Write: IICD
— with the address of the target slave. (The lsb of this byte determines whether the communication is
The routine shown in
incoming IIC message that contains the proper address begins IIC communication. For master operation,
communication must be initiated by writing to the IICD register.
Initialization/Application Information
IICC1
IICC2 GCAEN ADEXT
IICD
IICA
IICF
IICS
master receive or transmit.)
When addressed as a slave (in slave mode), the module responds to this address
Baud rate = BUSCLK / (2 x MULT x (SCL DIVIDER))
Module configuration
Module status flags
Data register; Write to transmit IIC data read to read IIC data
Address configuration
IICEN
TCF
MULT
Figure 11-12
IAAS
IICIE
MC9S08SH8 MCU Series Data Sheet, Rev. 3
BUSY
Figure 11-11. IIC Module Quick Start
MST
Module Initialization (Master)
0
Module Initialization (Slave)
can handle both master and slave IIC operations. For slave operation, an
Register Model
Module Use
ARBL
TX
AD[7:1]
0
DATA
TXAK
0
0
ICR
Figure 11-12
Figure 11-12
RSTA
SRW
AD10
IICIF
AD9
0
RXAK
AD8
0
0
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