MC9S08SH4CTG Freescale, MC9S08SH4CTG Datasheet - Page 86

MC9S08SH4CTG

Manufacturer Part Number
MC9S08SH4CTG
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S08SH4CTG

Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
I2C/SCI/SPI
Total Internal Ram Size
256Byte
# I/os (max)
13
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
16
Package Type
TSSOP
Program Memory Type
Flash
Program Memory Size
4KB
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S08SH4CTG
Manufacturer:
FREESCAL
Quantity:
96
Part Number:
MC9S08SH4CTG
Manufacturer:
Freescale
Quantity:
8 727
Chapter 6 Parallel Input/Output Control
6.6.2.3
6.6.2.4
86
PTBPE[7:0]
PTBSE[7:0]
Reset:
Reset:
Field
Field
7:0
7:0
W
W
R
R
PTBPE7
PTBSE7
Internal Pull Enable for Port B Bits — Each of these control bits determines if the internal pull-up or pull-down
device is enabled for the associated PTB pin. For port B pins that are configured as outputs, these bits have no
effect and the internal pull devices are disabled.
0 Internal pull-up/pull-down device disabled for port B bit n.
1 Internal pull-up/pull-down device enabled for port B bit n.
Output Slew Rate Enable for Port B Bits — Each of these control bits determines if the output slew rate control
is enabled for the associated PTB pin. For port B pins that are configured as inputs, these bits have no effect.
0 Output slew rate control disabled for port B bit n.
1 Output slew rate control enabled for port B bit n.
Port B Pull Enable Register (PTBPE)
0
Port B Slew Rate Enable Register (PTBSE)
0
7
7
Pull-down devices only apply when using pin interrupt functions, when
corresponding edge select and pin select functions are configured.
PTBPE6
PTBSE6
Figure 6-13. Internal Pull Enable for Port B Register (PTBPE)
Figure 6-14. Slew Rate Enable for Port B Register (PTBSE)
0
0
6
6
Table 6-12. PTBPE Register Field Descriptions
Table 6-13. PTBSE Register Field Descriptions
MC9S08SH8 MCU Series Data Sheet, Rev. 3
PTBPE5
PTBSE5
0
0
5
5
PTBPE4
PTBSE4
NOTE
0
0
4
4
Description
Description
PTBPE3
PTBSE3
3
0
3
0
PTBPE2
PTBSE2
0
0
2
2
PTBPE1
PTBSE1
Freescale Semiconductor
0
0
1
1
PTBPE0
PTBSE0
0
0
0
0

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