ATA6613P-PLPW Atmel, ATA6613P-PLPW Datasheet - Page 51

• Manufacturer Part Number: ATA6613P-PLPW
• Description: MCU W/LIN TXRX REG WTCHDG 48-QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6613P-PLPW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: ATA6x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI, TWI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 3
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.6
6.6.1
6.6.1.1
6.6.1.2
6.6.1.3
9111H–AUTO–01/11
System Clock and Clock Options
Clock Systems and their Distribution
CPU Clock – clk
I/O Clock – clk
Flash Clock – clk
I/O
Figure 6-11
clocks need not be active at a given time. In order to reduce power consumption, the clocks to
modules not being used can be halted by using different sleep modes, as described in
Management and Sleep Modes” on page
Figure 6-11. Clock Distribution
The CPU clock is routed to parts of the system concerned with operation of the AVR core.
Examples of such modules are the General Purpose Register File, the Status Register and the
data memory holding the Stack Pointer. Halting the CPU clock inhibits the core from perform-
ing general operations and calculations.
The I/O clock is used by the majority of the I/O modules, like Timer/Counters, SPI, and
USART. The I/O clock is also used by the External Interrupt module, but note that some exter-
nal interrupts are detected by asynchronous logic, allowing such interrupts to be detected
even if the I/O clock is halted. Also note that start condition detection in the USI module is car-
ried out asynchronously when clk
The Flash clock controls operation of the Flash interface. The Flash clock is usually active
simultaneously with the CPU clock.
CPU
FLASH
Asynchronous
Timer/Counter
Timer/Counter
Oscillator
presents the principal clock systems in the AVR
General I/O
Modules
External Clock
clk
clk
ASY
I/O
I/O
is halted, TWI address recognition in all sleep modes.
System Clock
Control Unit
AVR Clock
Multiplexer
Prescaler
Clock
ADC
62. The clock systems are detailed below.
Source clock
clk
Oscillator
ADC
Crystal
Atmel ATA6612/ATA6613
CPU Core
clk
clk
Reset Logic
CPU
FLASH
Crystal Oscillator
Watchdog clock
Low-frequency
®
and their distribution. All of the
Watchdog Timer
RAM
Watchdog
Oscillator
Calibrated RC
Flash and
EEPROM
Oscillator
“Power
51