ATA6613P-PLPW Atmel, ATA6613P-PLPW Datasheet - Page 181

• Manufacturer Part Number: ATA6613P-PLPW
• Description: MCU W/LIN TXRX REG WTCHDG 48-QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6613P-PLPW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: ATA6x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI, TWI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 3
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.15.9.2
9111H–AUTO–01/11
Asynchronous Status Register – ASSR
During asynchronous operation, the synchronization of the Interrupt Flags for the asynchro-
nous timer takes 3 processor cycles plus one timer cycle. The timer is therefore advanced by
at least one before the processor can read the timer value causing the setting of the Interrupt
Flag. The Output Compare pin is changed on the timer clock and is not synchronized to the
processor clock.
Initial Value
Read/Write
• When the asynchronous operation is selected, the 32.768kHz Oscillator for
• Description of wake up from Power-save or ADC Noise Reduction mode when the timer is
• Reading of the TCNT2 Register shortly after wake-up from Power-save may give an
• Bit 6 – EXCLK: Enable External Clock Input
Timer/Counter2 is always running, except in Power-down and Standby modes. After a
Power-up Reset or wake-up from Power-down or Standby mode, the user should be aware
of the fact that this Oscillator might take as long as one second to stabilize. The user is
advised to wait for at least one second before using Timer/Counter2 after power-up or
wake-up from Power-down or Standby mode. The contents of all Timer/Counter2 Registers
must be considered lost after a wake-up from Power-down or Standby mode due to
unstable clock signal upon start-up, no matter whether the Oscillator is in use or a clock
signal is applied to the TOSC1 pin.
clocked asynchronously: When the interrupt condition is met, the wake up process is
started on the following cycle of the timer clock, that is, the timer is always advanced by at
least one before the processor can read the counter value. After wake-up, the MCU is
halted for four cycles, it executes the interrupt routine, and resumes execution from the
instruction following SLEEP.
incorrect result. Since TCNT2 is clocked on the asynchronous TOSC clock, reading TCNT2
must be done through a register synchronized to the internal I/O clock domain.
Synchronization takes place for every rising TOSC1 edge. When waking up from
Power-save mode, and the I/O clock (clk
previous value (before entering sleep) until the next rising TOSC1 edge. The phase of the
TOSC clock after waking up from Power-save mode is essentially unpredictable, as it
depends on the wake-up time. The recommended procedure for reading TCNT2 is thus as
follows:
When EXCLK is written to one, and asynchronous clock is selected, the external clock
input buffer is enabled and an external clock can be input on Timer Oscillator 1 (TOSC1)
pin instead of a 32kHz crystal. Writing to EXCLK should be done before asynchronous
operation is selected. Note that the crystal Oscillator will only run when this bit is zero.
Bit
a. Write a value to TCCR2x, TCNT2, or OCR2x.
b. Wait until the corresponding Update Busy Flag in ASSR returns to zero.
c. Enter Power-save or ADC Noise Reduction mode.
a. Write any value to either of the registers OCR2x or TCCR2x.
b. Wait for the corresponding Update Busy Flag to be cleared.
c. Read TCNT2.
R
7
–
0
EXCLK
R/W
6
0
AS2
R/W
5
0
TCN2UB
R
4
0
I/O
OCR2AUB
Atmel ATA6612/ATA6613
) again becomes active, TCNT2 will read as the
R
3
0
OCR2BUB
R
2
0
TCR2AUB
R
1
0
TCR2BUB
R
0
0
ASSR
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