ATA6613P-PLPW Atmel, ATA6613P-PLPW Datasheet - Page 300

MCU W/LIN TXRX REG WTCHDG 48-QFN

ATA6613P-PLPW

Manufacturer Part Number
ATA6613P-PLPW
Description
MCU W/LIN TXRX REG WTCHDG 48-QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet

Specifications of ATA6613P-PLPW

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
ATA6x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, TWI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
6.24
6.24.1
300
Memory Programming
Atmel ATA6612/ATA6613
Program And Data Memory Lock Bits
The Atmel
or can be programmed (“0”) to obtain the additional features listed in
bits can only be erased to “1” with the Chip Erase command. The SPM instruction is enabled
for the whole Flash if the SELFPRGEN fuse is programmed (“0”), otherwise it is disabled.
Table 6-113. Lock Bit Byte
Notes:
Table 6-114. Lock Bit Protection Modes
Notes:
BLB12
BLB11
BLB02
BLB01
LB2
LB1
LB Mode
1
2
3
Lock Bit Byte
(2)
(2)
(2)
(2)
1. “1” means unprogrammed, “0” means programmed
2. Only on Atmel ATA6612/ATA6613
Memory Lock Bits
1. Program the Fuse bits and Boot Lock bits before programming the LB1 and LB2.
2. “1” means unprogrammed, “0” means programmed
®
ATA6612/ATA6613 provides six Lock bits which can be left unprogrammed (“1”)
LB2
1
1
0
LB1
(1)
1
0
0
Bit No
7
6
5
4
3
2
1
0
Protection Type
No memory lock features enabled.
Further programming of the Flash and EEPROM is disabled in
Parallel and Serial Programming mode. The Fuse bits are locked
in both Serial and Parallel Programming mode.
Further programming and verification of the Flash and EEPROM
is disabled in Parallel and Serial Programming mode. The Boot
Lock bits and Fuse bits are locked in both Serial and Parallel
Programming mode.
(1)(2)
Description
Boot Lock bit
Boot Lock bit
Boot Lock bit
Boot Lock bit
Lock bit
Lock bit
(1)
Default Value
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
Table
(1)
6-114. The Lock
9111H–AUTO–01/11

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