ATA6613P-PLPW Atmel, ATA6613P-PLPW Datasheet - Page 142

MCU W/LIN TXRX REG WTCHDG 48-QFN

ATA6613P-PLPW

Manufacturer Part Number
ATA6613P-PLPW
Description
MCU W/LIN TXRX REG WTCHDG 48-QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet

Specifications of ATA6613P-PLPW

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
ATA6x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, TWI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
6.14.6
142
Atmel ATA6612/ATA6613
Output Compare Units
Using the Input Capture unit in any mode of operation when the TOP value (resolution) is
actively changed during operation, is not recommended.
Measurement of an external signal’s duty cycle requires that the trigger edge is changed after
each capture. Changing the edge sensing must be done as early as possible after the ICR1
Register has been read. After a change of the edge, the Input Capture Flag (ICF1) must be
cleared by software (writing a logical one to the I/O bit location). For measuring frequency
only, the clearing of the ICF1 Flag is not required (if an interrupt handler is used).
The 16-bit comparator continuously compares TCNT1 with the Output Compare Register
(OCR1x). If TCNT equals OCR1x the comparator signals a match. A match will set the Output
Compare Flag (OCF1x) at the next timer clock cycle. If enabled (OCIE1x = 1), the Output
Compare Flag generates an Output Compare interrupt. The OCF1x Flag is automatically
cleared when the interrupt is executed. Alternatively the OCF1x Flag can be cleared by soft-
ware by writing a logical one to its I/O bit location. The Waveform Generator uses the match
signal to generate an output according to operating mode set by the Waveform Generation
mode (WGM13:0) bits and Compare Output mode (COM1x1:0) bits. The TOP and BOTTOM
signals are used by the Waveform Generator for handling the special cases of the extreme
values in some modes of operation (see
A special feature of Output Compare unit A allows it to define the Timer/Counter TOP value
(i.e., counter resolution). In addition to the counter resolution, the TOP value defines the
period time for waveforms generated by the Waveform Generator.
Figure 6-43
and bit names indicates the device number (n = 1 for Timer/Counter 1), and the “x” indicates
Output Compare unit (A/B). The elements of the block diagram that are not directly a part of
the Output Compare unit are gray shaded.
Figure 6-43. Output Compare Unit, Block Diagram
shows a block diagram of the Output Compare unit. The small “n” in the register
OCRnxH Buf. (8-bit)
OCRnxH (8-bit)
BOTTOM
OCRnx Buffer (16-bit Register)
TEMP (8-bit)
TOP
OCRnx (16-bit Register)
OCRnxL Buf. (8-bit)
“Modes of Operation” on page
OCRnxL (8-bit)
DATA BUS (8-bit)
Waveform Generator
WGMn3:0
= (16-bit Comparator)
COMnx1:0
TCNTnH (8-bit)
OCFnx (Int.Req.)
TCNTn (16-bit Counter)
145).
TCNTnL (8-bit)
9111H–AUTO–01/11
OCnx

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