HW-SPAR3E-SK-US-G Xilinx Inc, HW-SPAR3E-SK-US-G Datasheet - Page 69
HW-SPAR3E-SK-US-G
Manufacturer Part Number
HW-SPAR3E-SK-US-G
Description
KIT STARTER SPARTAN-3E
Manufacturer
Xilinx Inc
Specifications of HW-SPAR3E-SK-US-G
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1507
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Digital to Analog Converter (DAC)
SPI Communication
Spartan-3E FPGA Starter Kit Board User Guide
UG230 (v1.2) January 20, 2011
R
The Spartan
Digital-to-Analog Converter (DAC). The DAC device is a Linear Technology LTC2624
quad DAC with 12-bit unsigned resolution. The four outputs from the DAC appear on the
J5 header, which uses the Digilent 6-pin
header are located immediately above the Ethernet RJ-45 connector, as shown in
Figure
As shown in
digital values to each of the four DAC channels. The SPI bus is a full-duplex, synchronous,
character-oriented channel employing a simple four-wire interface. A bus master—the
FPGA in this example—drives the bus clock signal (SPI_SCK) and transmits serial data
(SPI_MOSI) to the selected bus slave—the DAC in this example. At the same time, the bus
slave provides serial data (SPI_MISO) back to the bus master.
6-pin DAC Header (J5)
9-1.
Figure 9-1: Digital-to-Analog Converter and Associated Header
®
Figure
-3E FPGA Starter Kit board includes an SPI-compatible, four-channel, serial
9-2, the FPGA uses a Serial Peripheral Interface (SPI) to communicate
www.xilinx.com
Peripheral Module
Linear Tech LTC2624 Quad DAC
SPI_MOSI: (T4)
SPI_MISO: (N10)
SPI_SCK: (U16)
DAC_CS: (N8)
DAC_CLR: (P8)
format. The DAC and the
Chapter 9
UG230_c9_01_030906
69
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