HW-SPAR3E-SK-US-G Xilinx Inc, HW-SPAR3E-SK-US-G Datasheet - Page 102

no-image

HW-SPAR3E-SK-US-G

Manufacturer Part Number
HW-SPAR3E-SK-US-G
Description
KIT STARTER SPARTAN-3E
Manufacturer
Xilinx Inc
Datasheets

Specifications of HW-SPAR3E-SK-US-G

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1507
Chapter 12: SPI Serial Flash
102
be left floating. Why support multiple packages? In a word, flexibility. The multi-package
layout provides ...
Figure 12-18: Multi-Package Layout for the STMicroelectronics M25Pxx Family
Density migration between smaller- and larger-density SPI Flash PROMs. Not all
SPI Flash densities are available in all packages. The SPI Flash migration strategy
follows nicely with the pinout migration provided by Xilinx FPGAs.
Consistent configuration PROM layout when migrating between FPGA densities.
The Spartan-3E FPGA’s FG320 package footprint supports the XC3S500E, the
XC3S1200E, and the XC3S1600E FPGA devices without modification. The SPI Flash
multi-package layout allows comparable flexibility in the associated configuration
PROM. Ship the optimally-sized SPI Flash memory for the FPGA mounted on the
board.
Supply security. If a certain SPI Flash density is not available in the desired package,
switch to a different package style or to a different density to secure availability.
8-lead MLP
8-pin SOIC
Pin 1:
GND
W
Q
S
www.xilinx.com
(Do not connect)
(Do not connect)
Spartan-3E FPGA Starter Kit Board User Guide
UG230 (v1.2) January 20, 2011
UG230_c15_18_030606
Pin 1:
16-pin SOIC
VCC
HOLD
C
D
R

Related parts for HW-SPAR3E-SK-US-G