HW-SPAR3E-SK-US-G Xilinx Inc, HW-SPAR3E-SK-US-G Datasheet - Page 142

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HW-SPAR3E-SK-US-G

Manufacturer Part Number
HW-SPAR3E-SK-US-G
Description
KIT STARTER SPARTAN-3E
Manufacturer
Xilinx Inc
Datasheets

Specifications of HW-SPAR3E-SK-US-G

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1507
Appendix A: Schematics
FPGA Configurations Settings, Platform Flash PROM, SPI Serial
Flash, JTAG Connections
142
IC10MISC represents the various FPGA configuration connections.
IC11 is a 4 Mbit XCF04S Platform Flash PROM. Landing pads for a second XCF04S PROM
is shown as IC13, although the second PROM is not mounted on the XC3S500E version of
the board. Resistor R100 jumpers over the JTAG chain, bypassing the second XCF04S
PROM.
Jumper header J30 selects the FPGA’s configuration mode. See
additional information.
Header J28 is an alternate JTAG header.
IC12 is a Maxim/Dallas Semiconductor DS2432 SHA-1 EEPROM. See
1-Wire SHA-1 EEPROM,”
IC14 and IC15 are alternate landing pads for the STMicro SPI serial Flash. IC14 accepts the
16-pin SOIC package option, while IC15 accepts either the 8-pin SOIC or MLP package
option. See
Figure 12-18, page 102
www.xilinx.com
for more information.
for additional information.
Spartan-3E FPGA Starter Kit Board User Guide
UG230 (v1.2) January 20, 2011
Table 4-1, page 27
Chapter 17, “DS2432
for
R

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