HW-SPAR3E-SK-US-G Xilinx Inc, HW-SPAR3E-SK-US-G Datasheet - Page 52

• Manufacturer Part Number: HW-SPAR3E-SK-US-G
• Description: KIT STARTER SPARTAN-3E
• Manufacturer: Xilinx Inc

Specifications of HW-SPAR3E-SK-US-G

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1507

Chapter 5: Character LCD Screen
Operation
52
SF_D[11:8]
LCD_RW
LCD_RS
LCD_E
Four-Bit Data Interface
Read Data from CG RAM or DD RAM
Upper
4 bits
After the write operation, the address is automatically incremented or decremented by 1
according to the
Execution Time: 40 μs
Read data from DD RAM if the command follows a previous
command, or read data from CG RAM if the command follows a previous
Address
After the read operation, the address is automatically incremented or decremented by 1
according to the
during read operations.
Execution Time: 40 μs
The board uses a 4-bit data interface to the character LCD.
Figure 5-6
for setup, hold, and enable pulse length relative to the 50 MHz clock (20 ns period)
provided on the board.
1 μs
command.
Figure 5-6: Character LCD Interface Timing
illustrates a write operation to the LCD, showing the minimum times allowed
Lower
4 bits
Entry Mode Set
Entry Mode Set
SF_D[11:8]
www.xilinx.com
LCD_RW
LCD_RS
CLOCK
LCD_E
40 μs
command. The entry mode also determines display shift.
command. However, a display shift is not executed
40 ns
Spartan-3E FPGA Starter Kit Board User Guide
0 = Command, 1 = Data
Valid Data
230 ns
UG230 (v1.2) January 20, 2011
Set DD RAM Address
UG230_c5_03_022006
Set CG RAM
10 ns
R