HW-SPAR3E-SK-US-G Xilinx Inc, HW-SPAR3E-SK-US-G Datasheet - Page 148

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HW-SPAR3E-SK-US-G

Manufacturer Part Number
HW-SPAR3E-SK-US-G
Description
KIT STARTER SPARTAN-3E
Manufacturer
Xilinx Inc
Datasheets

Specifications of HW-SPAR3E-SK-US-G

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1507
Appendix A: Schematics
Power Supply Decoupling
148
IC10PWR represents the various voltage supply inputs to the FPGA and shows the power
decoupling network.
Jumper JP9 defines the voltage applied to VCCO on I/O Bank 0. The default setting is 3.3V.
See
additional details.
“Voltage Control,” page 22
www.xilinx.com
and
“Voltage Supplies to the Connector,” page 116
Spartan-3E FPGA Starter Kit Board User Guide
UG230 (v1.2) January 20, 2011
for
R

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