HW-SPAR3E-SK-US-G Xilinx Inc, HW-SPAR3E-SK-US-G Datasheet - Page 28

• Manufacturer Part Number: HW-SPAR3E-SK-US-G
• Description: KIT STARTER SPARTAN-3E
• Manufacturer: Xilinx Inc

Specifications of HW-SPAR3E-SK-US-G

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1507

Chapter 4: FPGA Configuration Options
PROG Push Button
DONE Pin LED
28
Table 4-1: Spartan-3E Configuration Mode Jumper Settings (Header J30 in
Figure
The PROG push button, shown in
the selected configuration memory source. Press and release this button to restart the
FPGA configuration process at any time.
The DONE pin LED, shown in
successfully configured. If this LED is not lit, then the FPGA is not configured.
Configuration
BPI Down
(see
Chapter 11,
“Intel
StrataFlash
Parallel NOR
Flash
PROM”)
JTAG
Mode
4-2)
Mode Pins
M2:M1:M0
0:1:1
0:1:0
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FPGA Configuration Image Source
Figure 4-2, page
StrataFlash parallel Flash PROM,
starting at address 0x1FF_FFFF and
decrementing through address
space. The CPLD controls address
lines A[24:20] during BPI
configuration.
Downloaded from host via USB-
JTAG port
Figure 4-2, page
Spartan-3E FPGA Starter Kit Board User Guide
26, lights whenever the FPGA is
26, forces the FPGA to reconfigure from
UG230 (v1.2) January 20, 2011
Jumper Settings
M0
M1
M2
M0
M1
M2
J30
J30
R