HW-SPAR3E-SK-US-G Xilinx Inc, HW-SPAR3E-SK-US-G Datasheet - Page 32

no-image

HW-SPAR3E-SK-US-G

Manufacturer Part Number
HW-SPAR3E-SK-US-G
Description
KIT STARTER SPARTAN-3E
Manufacturer
Xilinx Inc
Datasheets

Specifications of HW-SPAR3E-SK-US-G

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1507
Chapter 4: FPGA Configuration Options
32
Programming Platform Flash PROM via USB
Generating the FPGA Configuration Bitstream File
The on-board USB-JTAG circuitry also programs the Xilinx XCF04S serial Platform Flash
PROM. The steps provided in this section describe how to set up the PROM file and how
to download it to the board to ultimately program the FPGA.
Before generating the PROM file, create the FPGA bitstream file. The FPGA provides an
output clock, CCLK, when loading itself from an external PROM. The FPGA’s internal
CCLK oscillator always starts at its slowest setting, approximately 1.5 MHz. Most external
PROMs support a higher frequency. Increase the CCLK frequency as appropriate to reduce
the FPGA’s configuration time. The Xilinx XCF04S Platform Flash supports a 25 MHz
CCLK frequency.
Right-click Generator Programming File in the Processes pane, as shown in
Figure
Figure 4-9: iMPACT Programming Succeeded, the FPGA’s DONE Pin is High
4-10. Left-click Properties.
www.xilinx.com
Spartan-3E FPGA Starter Kit Board User Guide
UG230 (v1.2) January 20, 2011
UG230_c4_10_022406
R

Related parts for HW-SPAR3E-SK-US-G