HW-V5-ML550-UNI-G Xilinx Inc, HW-V5-ML550-UNI-G Datasheet - Page 72

EVALUATION PLATFORM VIRTEX-5

HW-V5-ML550-UNI-G

Manufacturer Part Number
HW-V5-ML550-UNI-G
Description
EVALUATION PLATFORM VIRTEX-5
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXTr
Type
FPGAr
Datasheet

Specifications of HW-V5-ML550-UNI-G

Contents
Development Platform, Power Supply, Loopback Board, CompactFlash Card, software and documentation
Silicon Manufacturer
Xilinx
Features
64M X 8 DDR SDRAM Memory, Six Samtec LVDS Connectors
Kit Contents
Board, Cable, PSU, CD, Docs
Silicon Family Name
Virtex-5
Silicon Core Number
XC5VLX50T-FFG1136
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
Virtex™-5 LXT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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Appendix C: LCD Interface
72
Controller – Power Supply Circuits
Figure C-5
boost mode, where VDD is 3.3V and VOUT is 16.5V. VOUT is the operating voltage of the
operational amplifier delivering the operating voltage, V0, for the LCD panel.
The LCD operating voltage, V0, is set with two resistors, R
when the resistors are external. INTRS is driven High when the resistors are internal. For
the XlvdsPro_PwrIo board, internal resistors are selected.
The LCD operating voltage (V0) and the Electronic Volume Voltage (V
in units of V with these formulae:
In
The values of the reference voltage parameter, , and the ratio R
bit settings in the LCD controller’s instruction registers. Thus, it is possible to change
physical operating parameters of the LCD through register bit settings, controlling the
operating voltage, and the electronic volume level.
Equation
shows the power supply circuits. The power supply is used in the five times
C-2, V
2
VDD
1
VSS
REF
is equal to 2.0V at 25 C.
V
EV
www.xilinx.com
Figure C-5: Power Supply Circuits
V0
=
=
1 63 –
1
+
-------------- -
300
R
------ -
R
DUTY1
DUTY2
BSTS
VR
MS
INTRS
17 VDD
18 VOUT
25
26
27
28
29
30 VSS1
16 VSS
DCDC5B
A
B
V
V
EV
REF
ML550 Networking Interfaces Platform
5 x VDD
A
VOUT
VDD
and R
UG202_C_05_050906
A
/R
UG202 (v1.4) April 18, 2008
B
. INTRS is driven Low
B
EV
are determined with
VSS
) can be calculated
Equation C-1
Equation C-2
R

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