HW-V5-ML550-UNI-G Xilinx Inc, HW-V5-ML550-UNI-G Datasheet - Page 47

• Manufacturer Part Number: HW-V5-ML550-UNI-G
• Description: EVALUATION PLATFORM VIRTEX-5
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXTr
• Type: FPGAr

Specifications of HW-V5-ML550-UNI-G

• Contents: Development Platform, Power Supply, Loopback Board, CompactFlash Card, software and documentation
• Silicon Manufacturer: Xilinx
• Features: 64M X 8 DDR SDRAM Memory, Six Samtec LVDS Connectors
• Kit Contents: Board, Cable, PSU, CD, Docs
• Silicon Family Name: Virtex-5
• Silicon Core Number: XC5VLX50T-FFG1136
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: Virtex™-5 LXT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

JTAG Ports
ML550 Networking Interfaces Platform
UG202 (v1.4) April 18, 2008
R
The ML550 Development Board provides two JTAG connectors (P50 and P51) that can be
used to program the Virtex-5 FPGA.
connectors P50.
Table 4-2
Table 4-2: P50 JTAG Header Signal Descriptions and Pin Assignments
TSTTDO
TSTTDI
TSTTCK
TSTTMS
HALTB
TRSTB
Signal Name
describes the P50 JTAG Header signal names, descriptions, and pin assignments.
JTAG TDO from System ACE
Interface
JTAG TDI to System ACE
Interface
JTAG TCK to System ACE
Interface
JTAG TMS to System ACE
Interface
User Defined
User Defined
Description
www.xilinx.com
Figure 4-3: JTAG Connector P50
CABLE_3V3
TRSTB
HALTB
Figure 4-3
TMS
TDO
TCK
TDI
1
2
3
4
5
6
7
8
shows the pin assignments for JTAG
P50
Number
P50 Pin
UG202_4_03_120706
3
2
4
1
8
7
GND
N/A; goes to FPGA pin AG5
N/A; goes to FPGA pin AF5
System ACE Pin Number
102
101
97
98
JTAG Ports
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