HW-V5-ML550-UNI-G Xilinx Inc, HW-V5-ML550-UNI-G Datasheet - Page 2

EVALUATION PLATFORM VIRTEX-5

HW-V5-ML550-UNI-G

Manufacturer Part Number
HW-V5-ML550-UNI-G
Description
EVALUATION PLATFORM VIRTEX-5
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXTr
Type
FPGAr
Datasheet

Specifications of HW-V5-ML550-UNI-G

Contents
Development Platform, Power Supply, Loopback Board, CompactFlash Card, software and documentation
Silicon Manufacturer
Xilinx
Features
64M X 8 DDR SDRAM Memory, Six Samtec LVDS Connectors
Kit Contents
Board, Cable, PSU, CD, Docs
Silicon Family Name
Virtex-5
Silicon Core Number
XC5VLX50T-FFG1136
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
Virtex™-5 LXT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development
of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the
Documentation in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise,
without the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation. Xilinx reserves
the right, at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errors
contained in the Documentation, or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection with
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WARRANTIES, WHETHER EXPRESS, IMPLIED, OR STATUTORY, REGARDING THE DOCUMENTATION, INCLUDING ANY
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NONINFRINGEMENT OF THIRD-PARTY
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© 2006–2008 Xilinx, Inc. All rights reserved.
XILINX, the Xilinx logo, Virtex, Spartan, ISE and other designated brands included herein are trademarks of Xilinx in the United States and
other countries. The PowerPC name and logo are registered trademarks of IBM Corp. and used under license. All other trademarks are the
property of their respective owners.
Revision History
The following table shows the revision history for this document.
ML550 Networking Interfaces Platform
05/12/06
04/02/07
06/22/07
10/08/07
04/18/08
Date
Version
1.0
1.1
1.2
1.3
1.4
Initial Xilinx release.
Revised User Guide with LXT and SXT devices. Added reference to Power Monitor
header in
Figure 3-7, page
LVDS_DATAOUT_1, Pin 47 and Pin 49, in
LVDS_DATAOUT_43 in
Updated pin numbers in
Updated pin names/numbers in
Added new section
Chapter
3.
Figure 1-1, page
29. Added
“ML550 System Monitor and Power Monitor Support,” page 34
www.xilinx.com
Table A-3, page
Table 3-12, page
13. Added note to
“Power Monitor Connector”
Table
Revision
A-1,
54.
33. Added
Table A-1, page
R
Table
Table 3-2, page
A-2, and
Appendix D, “ML550 Starter UCF.”
section. Revised
51. Revised
Table
21. Changed fuse in
UG202 (v1.4) April 18, 2008
A-4.
to

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