HW-V5-ML550-UNI-G Xilinx Inc, HW-V5-ML550-UNI-G Datasheet - Page 21

• Manufacturer Part Number: HW-V5-ML550-UNI-G
• Description: EVALUATION PLATFORM VIRTEX-5
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXTr
• Type: FPGAr

Specifications of HW-V5-ML550-UNI-G

• Contents: Development Platform, Power Supply, Loopback Board, CompactFlash Card, software and documentation
• Silicon Manufacturer: Xilinx
• Features: 64M X 8 DDR SDRAM Memory, Six Samtec LVDS Connectors
• Kit Contents: Board, Cable, PSU, CD, Docs
• Silicon Family Name: Virtex-5
• Silicon Core Number: XC5VLX50T-FFG1136
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: Virtex™-5 LXT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

SDRAM Memory
ML550 Networking Interfaces Platform
UG202 (v1.4) April 18, 2008
R
The ML550 Development Board provides 64 MBytes of SDRAM memory (Micron
Semiconductor MT46V64M8BN-75). The high-level block diagram of the SDRAM interface
is shown in
FFG1136 package used on the ML550 Development Board.
Table 3-2: SDRAM Memory Interface Signal Descriptions
Signal Name
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
DQ0
DQ1
Figure
Address 0
Address 1
Address 2
Address 3
Address 4
Address 5
Address 6
Address 7
Address 8
Address 9
Address 10
Address 11
Address12
Data 0
Data 1
Figure 3-2: Block Diagram of the SDRAM Interface
3-2.
Virtex-5
FPGA
Table 3-2
www.xilinx.com
Description
lists the SDRAM memory interface signals for the
DQ[7:0], DQS0
Address[12:0]
CLKP, CLKN
BA[1:0]
RASn
CASn
DM0
WEn
CKE
CSn
(FFG1136 Package, Bank 12)
J5
J6
T6
R6
K6
K7
P6
P7
L4
P5
N5
L6
M7
T10
F6
FPGA Pin Number
32M x 16
SDRAM
ug202_3_02_032607
SDRAM Memory
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