MC-78F0712-KIT Renesas Electronics America, MC-78F0712-KIT Datasheet - Page 84

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MC-78F0712-KIT

Manufacturer Part Number
MC-78F0712-KIT
Description
KIT REF SYSTEM 78K0 UPD78F0712
Manufacturer
Renesas Electronics America
Datasheets

Specifications of MC-78F0712-KIT

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
<R>
(7) System wait control register (VSWC)
82
This register is used to control wait states when a high-speed CPU and a low-speed peripheral I/O are connected.
VSWC can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears this register to 00H.
Address: FFFDH
Symbol
VSWC
Cautions 1. Be sure to insert two wait states if the minimum instruction execution time is
PDW1
7
0
0
1
After reset: 00H
Figure 5-8. Format of System Wait Control Register (VSWC)
2. Be sure to clear bits 0 and 2 to 7 to 0.
No wait
Two wait states inserted
0.125 s or less (f
6
0
R/W
CHAPTER 5 CLOCK GENERATOR
User’s Manual U17890EJ2V0UD
5
0
XP
= 16 MHz or more).
Control of system clock data wait
4
0
3
0
2
0
PDW1
1
0
0

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