MC-78F0712-KIT Renesas Electronics America, MC-78F0712-KIT Datasheet - Page 108
MC-78F0712-KIT
Manufacturer Part Number
MC-78F0712-KIT
Description
KIT REF SYSTEM 78K0 UPD78F0712
Manufacturer
Renesas Electronics America
Specifications of MC-78F0712-KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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(3) A/D trigger selection register (TW0TRGS)
(4) Inverter timer output control register (TW0OC)
106
TW0TRGS is a register used to select the A/D converter trigger signal from INTTW0CM4 and INTTW0CM5,
which are generated upon a match between the compare register (TW0CM4, TW0CM5) and timer counter
(TW0UDC).
TW0TRGS can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input sets TW0TRGS to 00H.
TW0OC sets timer output stop in phase (U-phase/V-phase/W-phase) units.
TW0OC can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input sets TW0OC to 00H.
Address: FF8BH
Symbol
TW0TRGS
Address: FF8CH
Symbol
TW0OC
TOSP01
TRSW1
7
0
0
0
1
1
7
0
0
0
1
1
After reset: 00H
After reset: 00H
Figure 6-5. Format of Inverter Timer Output Control Register
Figure 6-4. Format of A/D Trigger Selection Register
TOSP00
TRSW0
6
0
0
1
0
1
6
0
0
1
0
1
CHAPTER 6 10-BIT INVERTER CONTROL TIMER
R/W
R/W
No output (INTADTR is kept "Low" level)
INTTW0CM4
INTTW0CM5
INTTW0CM4 or INTTW0CM5
TW0TO0 to TW0TO5 output are permited
TW0TO0 and TW0TO1 output are prohibited (U phase off)
TW0TO2 and TW0TO3 output are prohibited (V phase off)
TW0TO4 and TW0TO5 output are prohibited (W phase off)
User’s Manual U17890EJ2V0UD
5
0
5
0
4
0
4
0
Output control for PWM output
Selection of A/D trigger
3
0
3
0
2
0
2
0
TOSP01
TRSW1
1
1
TOSP00
TRSW0
0
0
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