MC-78F0712-KIT Renesas Electronics America, MC-78F0712-KIT Datasheet - Page 241

• Manufacturer Part Number: MC-78F0712-KIT
• Description: KIT REF SYSTEM 78K0 UPD78F0712
• Manufacturer: Renesas Electronics America

Specifications of MC-78F0712-KIT

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

(d) Reception
R
X
D00 (input)
INTSR00
Reception is enabled and the R
interface operation mode register 00 (ASIM00) is set to 1 and then bit 5 (RXE00) of ASIM00 is set to 1.
The 5-bit counter of the baud rate generator starts counting when the falling edge of the R
detected. When the set value of baud rate generator control register 00 (BRGC00) has been counted, the
R
recognized as a start bit.
When the start bit is detected, reception is started, and serial data is sequentially stored in receive shift
register 00 (RXS00) at the set baud rate. When the stop bit has been received, the reception completion
interrupt (INTSR00) is generated and the data of RXS00 is written to receive buffer register 00 (RXB00). If
an overrun error (OVE00) occurs, however, the receive data is not written to RXB00.
Even if a parity error (PE00) occurs while reception is in progress, reception continues to the reception
position of the stop bit, and an error interrupt (INTSRE00) is generated after completion of reception.
Cautions 1. Be sure to read receive buffer register 00 (RXB00) even if a reception error occurs.
X
RXB00
D00 pin input is sampled again (
2. Reception is always performed with the “number of stop bits = 1”. The second stop bit
3. Be sure to read asynchronous serial interface reception error status register 00
Otherwise, an overrun error will occur when the next data is received, and the reception
error status will persist.
is ignored.
(ASIS00) before reading RXB00.
Start
Figure 14-9. Reception Completion Interrupt Request Timing
D0
CHAPTER 14 SERIAL INTERFACE UART00
D1
X
D00 pin input is sampled when bit 7 (POWER00) of asynchronous serial
User’s Manual U17890EJ2V0UD
D2
in Figure 14-9). If the R
D3
D4
D5
D6
X
D00 pin is low level at this time, it is
D7
Parity
Stop
X
D00 pin input is
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