MC-78F0712-KIT Renesas Electronics America, MC-78F0712-KIT Datasheet - Page 225

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MC-78F0712-KIT

Manufacturer Part Number
MC-78F0712-KIT
Description
KIT REF SYSTEM 78K0 UPD78F0712
Manufacturer
Renesas Electronics America
Datasheets

Specifications of MC-78F0712-KIT

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
(5) ANI0/P20 to ANI3/P23
(6) Input impedance of ANI0 to ANI3 pins
(7) AV
(8) Interrupt request flag (ADIF)
<1> The analog input pins (ANI0 to ANI3) are also used as input port pins (P20 to P23).
<2> If a digital pulse is applied to the pins adjacent to the pins currently used for A/D conversion, the expected
In this A/D converter, the internal sampling capacitor is charged and sampling is performed.
Since only the leakage current flows other than during sampling and the current for charging the capacitor also
flows during sampling, the input impedance fluctuates and has no meaning.
To perform sufficient sampling, however, it is recommended to make the output impedance of the analog input
source 10 k or lower, or attach a capacitor of around 100 pF to the ANI0 to ANI3 pins (see Figure 13-21).
A series resistor string of several tens of 10 k is connected between the AV
Therefore, if the output impedance of the reference voltage source is high, this will result in a series connection to
the series resistor string between the AV
The interrupt request flag (ADIF) is not cleared even if the analog input channel specification register (ADS) is
changed.
Therefore, if an analog input pin is changed during A/D conversion, the A/D conversion result and ADIF for the
pre-change analog input may be set just before the ADS rewrite. Caution is therefore required since, at this time,
when ADIF is read immediately after the ADS rewrite, ADIF is set despite the fact A/D conversion for the post-
change analog input has not ended.
When A/D conversion is stopped and then resumed, clear ADIF before the A/D conversion operation is resumed.
Remarks 1. n = 0 to 3
A/D conversion
REF
When A/D conversion is performed with any of ANI0 to ANI3 selected, do not access port 2 while
conversion is in progress; otherwise the conversion resolution may be degraded.
value of the A/D conversion may not be obtained due to coupling noise. Therefore, do not apply a pulse to
the pins adjacent to the pin undergoing A/D conversion.
pin input impedance
ADCR
ADIF
2. m = 0 to 3
ADS rewrite
(start of ANIn conversion)
Figure 13-22. Timing of A/D Conversion End Interrupt Request Generation
ANIn
CHAPTER 13 A/D CONVERTER
REF
ADS rewrite
(start of ANIm conversion)
User’s Manual U17890EJ2V0UD
ANIn
and AV
ANIn
SS
pins, resulting in a large reference voltage error.
ANIm
ANIn
ADIF is set but ANIm conversion
has not ended.
REF
and AV
ANIm
ANIm
SS
pins.
ANIm
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