MC-78F0712-KIT Renesas Electronics America, MC-78F0712-KIT Datasheet - Page 356

• Manufacturer Part Number: MC-78F0712-KIT
• Description: KIT REF SYSTEM 78K0 UPD78F0712
• Manufacturer: Renesas Electronics America

Specifications of MC-78F0712-KIT

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

27.2 Peripheral Hardware That Generates Wait
number of wait clocks of the CPU.
Note No wait cycle is generated for the CPU if the number of wait clocks calculated by the above expression is 1.
Remark The clock is the CPU clock (f
354
Watchdog timer
Serial interface UART00
A/D converter
Table 27-1 shows the registers that generate a wait request when an access from the CPU is made, and the
Peripheral Hardware
Table 27-1. Registers That Generate Wait and Number of CPU Wait Clocks (When VSWC = 0)
* The result after the decimal point is truncated if it is less than t
WDTM
ASIS00
ADM
ADS
PFM
PFT
ADCR
<Calculating maximum number of wait clocks>
{(1/f
(1/f
f
f
t
MACRO
CPU
CPUL
CPU
:
MACRO
:
:
), and is rounded up if it exceeds t
Register
)
Macro operating frequency
(When bit 5 (FR2) of ADM = “1”: f
CPU clock frequency
Low-level width of CPU clock
CPU
CHAPTER 27 CAUTIONS FOR WAIT
2/(1/f
).
CPU
User’s Manual U17890EJ2V0UD
)} + 1
Read
Write
Write
Write
Write
Write
Read
Access
CPUL
X
.
/2, when bit 5 (FR2) of ADM = “0”: f
3 clocks (fixed)
1 clock (fixed)
1 to 5 clocks
(when ADM.5 flag = “1”)
1 to 9 clocks
(when ADM.5 flag = “0”)
1 to 5 clocks
(when ADM.5 flag = “1”)
1 to 9 clocks
(when ADM.5 flag = “0”)
CPUL
Number of Wait Clocks
after it has been multiplied by
Note
Note
X
/2
2
)