MC-78F0712-KIT Renesas Electronics America, MC-78F0712-KIT Datasheet - Page 56

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MC-78F0712-KIT

Manufacturer Part Number
MC-78F0712-KIT
Description
KIT REF SYSTEM 78K0 UPD78F0712
Manufacturer
Renesas Electronics America
Datasheets

Specifications of MC-78F0712-KIT

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
3.4.8
54
[Function]
[Operand format]
[Description example]
[Illustration]
The B or C register contents specified in an instruction word are added to the contents of the base register, that
is, the HL register pair in the register bank specified by the register bank select flag (RBS0 and RBS1), and the
sum is used to address the memory. Addition is performed by expanding the B or C register contents as a
positive number to 16 bits. A carry from the 16th bit is ignored. This addressing can be carried out for all the
memory spaces.
In the case of MOV A, [HL + B] (selecting B register)
Based indexed addressing
The contents of the memory
addressed are transferred.
HL
Identifier
A
16
7
[HL + B], [HL + C]
Operation code
CHAPTER 3 CPU ARCHITECTURE
H
User’s Manual U17890EJ2V0UD
8
0
1
+
7
7
7
Description
0
1
0
1
Memory
L
B
0
1
1
0
0
0

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