MC-78F0712-KIT Renesas Electronics America, MC-78F0712-KIT Datasheet - Page 282

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MC-78F0712-KIT

Manufacturer Part Number
MC-78F0712-KIT
Description
KIT REF SYSTEM 78K0 UPD78F0712
Manufacturer
Renesas Electronics America
Datasheets

Specifications of MC-78F0712-KIT

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
280
(2) HALT mode release
The HALT mode can be released by the following two sources.
(a) Release by unmasked interrupt request
low-speed oscillation clock
When an unmasked interrupt request is generated, the HALT mode is released. If interrupt
acknowledgement is enabled, vectored interrupt servicing is carried out. If interrupt acknowledgement is
disabled, the next address instruction is executed.
Remarks 1. The broken lines indicate the case when the interrupt request which has released the standby
High-speed system
clock or internal
Status of CPU
release signal
2. The wait time is as follows:
mode is acknowledged.
• When vectored interrupt servicing is carried out: 8 or 9 clocks
• When vectored interrupt servicing is not carried out: 2 or 3 clocks
Figure 17-3. HALT Mode Release by Interrupt Request Generation
Standby
Operating mode
CHAPTER 17 STANDBY FUNCTION
instruction
HALT
User’s Manual U17890EJ2V0UD
HALT mode
Interrupt
request
Oscillation
Wait
Wait
Operating mode

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