MC-78F0712-KIT Renesas Electronics America, MC-78F0712-KIT Datasheet - Page 224

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MC-78F0712-KIT

Manufacturer Part Number
MC-78F0712-KIT
Description
KIT REF SYSTEM 78K0 UPD78F0712
Manufacturer
Renesas Electronics America
Datasheets

Specifications of MC-78F0712-KIT

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
13.7 Cautions for A/D Converter
(1) Operating current in standby mode
(2) Input range of ANI0 to ANI3
(3) Conflicting operations
(4) Noise countermeasures
222
The A/D converter stops operating in the standby mode. At this time, the operating current can be reduced by
clearing bit 7 (ADCS) of the A/D converter mode register (ADM) to 0 (see Figure 13-2).
Observe the rated range of the ANI0 to ANI3 input voltage. If a voltage of AV
(even in the range of absolute maximum ratings) is input to an analog input channel, the converted value of that
channel becomes undefined. In addition, the converted values of the other channels may also be affected.
<1> Conflict between A/D conversion result register (ADCR) write and ADCR read by instruction upon the end
<2> Conflict between ADCR write and A/D converter mode register (ADM) write or analog input channel
To maintain the 10-bit resolution, attention must be paid to noise input to the AV
Because the effect increases in proportion to the output impedance of the analog input source, it is recommended
that a capacitor be connected externally, as shown in Figure 13-21, to reduce noise.
Reference
C = 100 to 1,000 pF
voltage
input
of conversion
ADCR read has priority. After the read operation, the new conversion result is written to ADCR.
specification register (ADS) write upon the end of conversion
ADM or ADS write has priority. ADCR write is not performed, nor is the conversion end interrupt signal
(INTAD) generated.
Figure 13-21. Analog Input Pin Connection
CHAPTER 13 A/D CONVERTER
User’s Manual U17890EJ2V0UD
AV
AV
V
ANI0 to ANI3
SS
REF
SS
If there is a possibility that noise equal to or higher than AV
equal to or lower than AV
small V
F
value (0.3 V or lower).
SS
may enter, clamp with a diode with a
REF
REF
or higher and AV
pin and pins ANI0 to ANI3.
SS
REF
or lower
or

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