MC-78F0712-KIT Renesas Electronics America, MC-78F0712-KIT Datasheet - Page 215

no-image

MC-78F0712-KIT

Manufacturer Part Number
MC-78F0712-KIT
Description
KIT REF SYSTEM 78K0 UPD78F0712
Manufacturer
Renesas Electronics America
Datasheets

Specifications of MC-78F0712-KIT

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
13.5.3 Operation modes
(1) Select mode
The following two operation modes are available. These operation modes are set by the ADM register.
One input analog signal specified by the ADS register while the ADM.ADMD bit = 0 is converted.
conversion is complete, the result of conversion is stored in the ADCR register.
At the same time, the A/D conversion end interrupt request signal (INTAD) is generated. However, the INTAD
signal may or may not be generated depending on setting of the PFM and PFT registers. For details, refer to
13.5.4 Power fail detection function.
If anything is written to the ADM, ADS, PFM, and PFT registers during conversion, A/D conversion is aborted. In
the software trigger mode, A/D conversion is started from the beginning again. In the hardware trigger mode, the
A/D converter waits for a trigger.
If the trigger is detected during conversion in hardware trigger mode, A/D conversion is aborted and started again
from the beginning.
Select mode
Scan mode
A/D conversion
Figure 13-11. Example of Select Mode Operation Timing (ADS.ADS2 to ADS.ADS0 Bits = 001B)
INTAD
ADCR
ANI1
Conversion start
Set ADCS bit = 1
Data 1
Data 1
(ANI1)
Conversion end
CHAPTER 13 A/D CONVERTER
Data 1
(ANI1)
User’s Manual U17890EJ2V0UD
Conversion start
Set ADCS bit = 1
Data 2
Data 2
(ANI1)
Conversion end
Data 2
(ANI1)
When
213

Related parts for MC-78F0712-KIT