MC-78F0712-KIT Renesas Electronics America, MC-78F0712-KIT Datasheet - Page 82

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MC-78F0712-KIT

Manufacturer Part Number
MC-78F0712-KIT
Description
KIT REF SYSTEM 78K0 UPD78F0712
Manufacturer
Renesas Electronics America
Datasheets

Specifications of MC-78F0712-KIT

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
80
(5) Oscillation stabilization time counter status register (OSTC)
This is the register that indicates the count status of the X1 clock oscillation stabilization time counter. When X1
clock oscillation starts with the internal low-speed oscillation clock used as the CPU clock, the X1 clock oscillation
stabilization time can be checked.
OSTC can be read by a 1-bit or 8-bit memory manipulation instruction.
When reset is released (reset by RESET input, POC, LVI, and WDT), the STOP instruction and MSTOP (bit 7 of
MOC register) = 1 clear OSTC to 00H.
Address: FFA3H
Symbol
OSTC
Figure 5-6. Format of Oscillation Stabilization Time Counter Status Register (OSTC)
Cautions 1. After the above time has elapsed, the bits are set to 1 in order from MOST11 and
Remark f
MOST11
7
0
1
1
1
1
1
After reset: 00H
2. The oscillation stabilization time counter counts up to the oscillation stabilization
3. The X1 clock oscillation stabilization wait time does not include the time until
4. OSTC cannot be used when the internal high-speed oscillation clock is selected
X
: X1 clock oscillation frequency
remain 1.
time set by OSTS.
oscillation clock is being used as the CPU clock, set the oscillation stabilization
time as follows.
Note, therefore, that only the status up to the oscillation stabilization time set by
OSTS is set to OSTC after STOP mode is released.
clock oscillation starts (“a” below).
as the high-speed system clock by using the option byte.
Secure wait time (350 s) by software.
If the STOP mode is entered and then released while the internal low-speed
MOST13
6
0
0
1
1
1
1
X1 pin voltage
waveform
Desired OSTC oscillation stabilization time
set by OSTS
R
CHAPTER 5 CLOCK GENERATOR
MOST14
User’s Manual U17890EJ2V0UD
5
0
0
0
1
1
1
STOP mode release
MOST11
MOST15
4
0
0
0
1
1
a
MOST13
MOST16
3
0
0
0
0
1
2
2
2
2
2
MOST14
11
13
14
15
16
Oscillation stabilization time status
/f
/f
/f
/f
/f
X
X
X
X
X
2
min. 102.4 s min. 128 s min.
min. 409.6 s min. 512 s min.
min. 819.2 s min. 1.02 ms min.
min. 1.64 ms min. 2.04 ms min.
min. 3.27 ms min. 4.09 ms min.
Oscillation stabilization time
f
X
= 20 MHz
MOST15
1
f
X
MOST16
= 16 MHz
0

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