MC-78F0712-KIT Renesas Electronics America, MC-78F0712-KIT Datasheet - Page 216

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MC-78F0712-KIT

Manufacturer Part Number
MC-78F0712-KIT
Description
KIT REF SYSTEM 78K0 UPD78F0712
Manufacturer
Renesas Electronics America
Datasheets

Specifications of MC-78F0712-KIT

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
(2) Scan mode
214
In this mode, the analog signals specified by the ADS register and input from the ANI0 pin while the ADM.ADMD
bit = 1 are sequentially selected and converted.
When conversion of one analog input signal is complete, the conversion result is stored in the ADCR register and,
at the same time, the A/D conversion end interrupt request signal (INTAD) is generated.
The A/D conversion results of all the analog input signals are stored in the ADCR register. It is therefore
recommended to save the contents of the ADCR register to RAM once A/D conversion of one analog input signal
has been completed.
In the hardware trigger mode (ADS.TRG bit = 1), the A/D converter waits for a trigger after it has completed A/D
conversion of the analog signals specified by the ADS register and input from the ANI0 pin.
If anything is written to the ADM, ADS, PFM, and PFT registers during conversion, A/D conversion is aborted. In
the software trigger mode, A/D conversion is started from the beginning again. In the hardware trigger mode, the
A/D converter waits for a trigger. Conversion starts again from the ANI0 pin.
If the trigger is detected during conversion in hardware trigger mode, A/D conversion is aborted and started again
from the beginning (ANI0 pin).
CHAPTER 13 A/D CONVERTER
User’s Manual U17890EJ2V0UD

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