MC-78F0712-KIT Renesas Electronics America, MC-78F0712-KIT Datasheet - Page 285

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MC-78F0712-KIT

Manufacturer Part Number
MC-78F0712-KIT
Description
KIT REF SYSTEM 78K0 UPD78F0712
Manufacturer
Renesas Electronics America
Datasheets

Specifications of MC-78F0712-KIT

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
17.2.2 STOP mode
(1) STOP mode setting and operating statuses
Notes 1.
10-bit inverter control timer
Real-time output ports
Item
System clock
CPU
Port (latch)
16-bit timer/event counter 00
8-bit timer/event counter 50
8-bit timer/event counter 51
Watchdog
timer
Hi-Z output controller
A/D converter
Serial interface
Multiplier/divider
Power-on-clear function
Low-voltage detection function
External interrupt
The STOP mode is set by executing the STOP instruction, and it can be set regardless of whether the CPU clock
before the setting was the high-speed system clock or internal low-speed oscillation clock.
Caution Because the interrupt request signal is used to clear the standby mode, if there is an interrupt
The operating statuses in the STOP mode are shown below.
2.
STOP Mode Setting
Internal
speed
cannot be
stopped
Internal
speed
can be stopped
When “Stopped by software” is selected for internal low-speed oscillator by an option byte and internal low-
speed oscillator is stopped by software (for option bytes, see CHAPTER 21 OPTION BYTES).
“Internal low-speed oscillator cannot be stopped” or “Internal low-speed oscillator can be stopped by
software” can be selected by an option byte.
source with the interrupt request flag set and the interrupt mask flag reset, the standby mode is
immediately cleared if set. Thus, the STOP mode is reset to the HALT mode immediately after
execution of the STOP instruction and the system returns to the operating mode as soon as the
wait time set using the oscillation stabilization time select register (OSTS) has elapsed.
UART00
oscillator
oscillator
low-
low-
Note 2
Note 2
Operation stopped
Only X1 oscillator or internal high-speed oscillator oscillation is stopped. Clock supply to the CPU is stopped.
Operation stopped
Status before STOP mode was set is retained
Operation stopped
Operation stopped
Operable only when TI50 is selected as the count clock
Operation stopped
Operable
Operation stopped
Operable
Operation stopped
Operable only when TM51 output is selected as the count clock during TM51 operation
Operation stopped
Operable
Operable
Operable
When STOP Instruction Is Executed While CPU Is Operating on High-speed
Oscillation Clock Continues
When Internal Low-speed
Table 17-4. Operating Statuses in STOP Mode
CHAPTER 17 STANDBY FUNCTION
User’s Manual U17890EJ2V0UD
System Clock
When Internal Low-speed Oscillation
Clock Stopped
Note 1
When STOP Instruction Is Executed
Operable
While CPU Is Operating on Internal
Low-speed Oscillation Clock
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