MC-78F0712-KIT Renesas Electronics America, MC-78F0712-KIT Datasheet - Page 233

• Manufacturer Part Number: MC-78F0712-KIT
• Description: KIT REF SYSTEM 78K0 UPD78F0712
• Manufacturer: Renesas Electronics America

Specifications of MC-78F0712-KIT

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

(2) Asynchronous serial interface reception error status register 00 (ASIS00)
Address: FF73H After reset: 00H R
ASIS00
Cautions 1. The operation of the PE00 bit differs depending on the set values of the PS001 and PS000
Symbol
This register indicates an error status on completion of reception by serial interface UART00. It includes three
error flag bits (PE00, FE00, OVE00).
This register is read-only by an 8-bit memory manipulation instruction.
RESET input, bit 7 (POWER00) of ASIM00 = 0, or bit 5 (RXE00) of ASIM00 = 0 clears this register to 00H. And
reading of this register also clears this register to 00H.
Figure 14-3. Format of Asynchronous Serial Interface Reception Error Status Register 00 (ASIS00)
2. Only the first bit of the receive data is checked as the stop bit, regardless of the number of
3. If an overrun error occurs, the next receive data is not written to receive buffer register 00
4. If data is read from ASIS00, a wait cycle is generated.
OVE00
PE00
FE00
bits of asynchronous serial interface operation mode register 00 (ASIM00).
stop bits.
(RXB00) but discarded.
CAUTIONS FOR WAIT.
7
0
0
1
0
1
0
1
If POWER00 = 0 and RXE00 = 0, or if ASIS00 register is read.
If the parity of transmit data does not match the parity bit on completion of reception.
If POWER00 = 0 and RXE00 = 0, or if ASIS00 register is read.
If the stop bit is not detected on completion of reception.
If POWER00 = 0 and RXE00 = 0, or if ASIS00 register is read.
If receive data is set to the RXB00 register and the next reception operation is completed before the
data is read.
6
0
CHAPTER 14 SERIAL INTERFACE UART00
5
0
User’s Manual U17890EJ2V0UD
Status flag indicating framing error
Status flag indicating overrun error
Status flag indicating parity error
4
0
3
0
PE00
2
For details, see CHAPTER 27
FE00
1
OVE00
0
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