C8051F996DK Silicon Laboratories Inc, C8051F996DK Datasheet - Page 72

KIT DEV FOR C8051F996

C8051F996DK

Manufacturer Part Number
C8051F996DK
Description
KIT DEV FOR C8051F996
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F996DK

Contents
Board, Batteries, Cables, CDs, Debug Adapter, Documentation, Power Adapter
Processor To Be Evaluated
C8051F996
Processor Series
C8051F98x
Interface Type
USB
Operating Supply Voltage
3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F996
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1963
C8051F99x-C8051F98x
SFR Definition 5.1. ADC0CN: ADC0 Control
SFR Page = 0x0; SFR Address = 0xE8; bit-addressable;
72
Name
Reset
Bit
Type
2:0
7
6
5
4
3
Bit
ADC0CM[2:0] ADC0 Start of Conversion Mode Select.
BURSTEN
AD0BUSY
AD0WINT
AD0INT
AD0EN
AD0EN
Name
R/W
7
0
BURSTEN
ADC0 Enable.
0: ADC0 Disabled (low-power shutdown).
1: ADC0 Enabled (active and ready for data conversions).
ADC0 Burst Mode Enable.
0: ADC0 Burst Mode Disabled.
1: ADC0 Burst Mode Enabled.
ADC0 Conversion Complete Interrupt Flag.
Set by hardware upon completion of a data conversion (BURSTEN=0), or a burst
of conversions (BURSTEN=1). Can trigger an interrupt. Must be cleared by soft-
ware.
ADC0 Busy.
Writing 1 to this bit initiates an ADC conversion when ADC0CM[2:0] = 000.
ADC0 Window Compare Interrupt Flag.
Set by hardware when the contents of ADC0H:ADC0L fall within the window speci-
fied by ADC0GTH:ADC0GTL and ADC0LTH:ADC0LTL. Can trigger an interrupt.
Must be cleared by software.
Specifies the ADC0 start of conversion source.
000: ADC0 conversion initiated on write of 1 to AD0BUSY.
001: ADC0 conversion initiated on overflow of Timer 0.
010: ADC0 conversion initiated on overflow of Timer 2.
011: ADC0 conversion initiated on overflow of Timer 3.
1xx: ADC0 conversion initiated on rising edge of CNVSTR.
R/W
6
0
AD0INT
R/W
5
0
AD0BUSY AD0WINT
Rev. 1.0
W
4
0
Function
R/W
3
0
2
0
ADC0CM[2:0]
R/W
1
0
0
0

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