C8051F996DK Silicon Laboratories Inc, C8051F996DK Datasheet - Page 263

• Manufacturer Part Number: C8051F996DK
• Description: KIT DEV FOR C8051F996
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F996DK

• Contents: Board, Batteries, Cables, CDs, Debug Adapter, Documentation, Power Adapter
• Processor To Be Evaluated: C8051F996
• Processor Series: C8051F98x
• Interface Type: USB
• Operating Supply Voltage: 3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: C8051F996
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1963

24. Enhanced Serial Peripheral Interface (SPI0)
The Enhanced Serial Peripheral Interface (SPI0) provides access to a flexible, full-duplex synchronous
serial bus. SPI0 can operate as a master or slave device in both 3-wire or 4-wire modes, and supports
multiple masters and slaves on a single SPI bus. The slave-select (NSS) signal can be configured as an
input to select SPI0 in slave mode, or to disable Master Mode operation in a multi-master environment,
avoiding contention on the SPI bus when more than one master attempts simultaneous data transfers.
NSS can also be configured as a chip-select output in master mode, or disabled for 3-wire operation.
Additional general purpose port I/O pins can be used to select multiple slave devices in master mode.
SYSCLK
Clock Divide
SPI0CKR
SFR Bus
SPI0DAT
Logic
Write
Transmit Data Buffer
Receive Data Buffer
7
Figure 24.1. SPI Block Diagram
6
Shift Register
5
SPI CONTROL LOGIC
4
3
Data Path
2
SFR Bus
SPI0CFG
Control
SPI0DAT
1
SPI0DAT
Read
0
Rev. 1.0
Tx Data
Rx Data
Pin Interface
C8051F99x-C8051F98x
Control
Control
Logic
Pin
SPI0CN
MOSI
MISO
SCK
NSS
C
R
O
S
S
B
A
R
SPI IRQ
Port I/O
263