C8051F996DK Silicon Laboratories Inc, C8051F996DK Datasheet - Page 304

• Manufacturer Part Number: C8051F996DK
• Description: KIT DEV FOR C8051F996
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F996DK

• Contents: Board, Batteries, Cables, CDs, Debug Adapter, Documentation, Power Adapter
• Processor To Be Evaluated: C8051F996
• Processor Series: C8051F98x
• Interface Type: USB
• Operating Supply Voltage: 3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: C8051F996
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1963

C8051F99x-C8051F98x
26.3.3. High-Speed Output Mode
In High-Speed Output mode, a module’s associated CEXn pin is toggled each time a match occurs
between the PCA Counter and the module's 16-bit capture/compare register (PCA0CPHn and
PCA0CPLn). When a match occurs, the Capture/Compare Flag (CCFn) in PCA0CN is set to logic 1. An
interrupt request is generated if the CCFn interrupt for that module is enabled. The CCFn bit is not
automatically cleared by hardware when the CPU vectors to the interrupt service routine, and must be
cleared by software. Setting the TOGn, MATn, and ECOMn bits in the PCA0CPMn register enables the
High-Speed Output mode. If ECOMn is cleared, the associated pin will retain its state, and not toggle on
the next match event.
Important Note About Capture/Compare Registers: When writing a 16-bit value to the PCA0
Capture/Compare registers, the low byte should always be written first. Writing to PCA0CPLn clears the
ECOMn bit to 0; writing to PCA0CPHn sets ECOMn to 1.
26.3.4. Frequency Output Mode
Frequency Output Mode produces a programmable-frequency square wave on the module’s associated
CEXn pin. The capture/compare module high byte holds the number of PCA clocks to count before the
output is toggled. The frequency of the square wave is then defined by Equation 26.1.
304
Note: A value of 0x00 in the PCA0CPHn register is equal to 256 for this equation.
PCA0CPLn
Write to
Reset
PCA0CPHn
Write to
0
ENB
ENB
1
PCA
Timebase
Figure 26.6. PCA High-Speed Output Mode Diagram
Enable
Equation 26.1. Square Wave Frequency Output
P
W
M
1
6
n
x
C
O
M
E
n
PCA0CPLn
PCA0CPMn
C
A
P
P
n
0 0
PCA0L
C
N
A
P
n
16-bit Comparator
M
A
T
n
O
G
T
n
F
W
M
P
n
0 x
CEXn
E
C
C
F
n
PCA0CPHn
PCA0H
=
---------------------------------------- -
2
Rev. 1.0

PCA0CPHn
F
PCA
Match
Toggle
C
F
C
R
TOGn
0
1
PCA0CN
0
1
CEXn
C
C
F
2
C
C
F
1
C
C
F
0
PCA Interrupt
Crossbar
Port I/O