C8051F996DK Silicon Laboratories Inc, C8051F996DK Datasheet - Page 226

KIT DEV FOR C8051F996

C8051F996DK

Manufacturer Part Number
C8051F996DK
Description
KIT DEV FOR C8051F996
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F996DK

Contents
Board, Batteries, Cables, CDs, Debug Adapter, Documentation, Power Adapter
Processor To Be Evaluated
C8051F996
Processor Series
C8051F98x
Interface Type
USB
Operating Supply Voltage
3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F996
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1963
C8051F99x-C8051F98x
SFR Definition 21.8. P0: Port0
SFR Page = All; SFR Address = 0x80; Bit-Addressable
SFR Definition 21.9. P0SKIP: Port0 Skip
SFR Page= 0x0; SFR Address = 0xD4
226
Name
Reset
Name
Reset
Type
Type
Bit
7:0
7:0
Bit
Bit
Bit
P0SKIP[7:0] Port 0 Crossbar Skip Enable Bits.
Name
P0[7:0]
Name
7
1
7
0
Port 0 Data.
Sets the Port latch logic
value or reads the Port pin
logic state in Port cells con-
figured for digital I/O.
These bits select Port 0 pins to be skipped by the Crossbar Decoder. Port pins used
for analog, special functions or GPIO should be skipped by the Crossbar.
0: Corresponding P0.n pin is not skipped by the Crossbar.
1: Corresponding P0.n pin is skipped by the Crossbar.
6
1
6
0
Description
5
1
5
0
Rev. 1.0
4
1
4
0
0: Set output latch to logic
LOW.
1: Set output latch to logic
HIGH.
P0SKIP[7:0]
P0[7:0]
R/W
R/W
Function
Write
3
1
3
0
2
1
2
0
0: P0.n Port pin is logic
LOW.
1: P0.n Port pin is logic
HIGH.
1
1
1
0
Read
0
1
0
0

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