DV164136 Microchip Technology, DV164136 Datasheet - Page 324

• Manufacturer Part Number: DV164136
• Description: DEVELOPMENT KIT FOR PIC18
• Manufacturer: Microchip Technology
• Series: PIC®r
• Type: MCUr

Specifications of DV164136

• Contents: Board, Cables, CDs, PICkit™ 3 Programmer, Power Supply
• Processor To Be Evaluated: PIC18F8722, PIC18F87J11
• Interface Type: RS-232, USB
• Operating Supply Voltage: 3.3 V, 5 V
• Silicon Manufacturer: Microchip
• Core Architecture: PIC
• Core Sub-architecture: PIC18
• Silicon Core Number: PIC18F
• Silicon Family Name: PIC18F8xxx
• Kit Contents: PIC18 Exp Brd PICkit 3 Cable CD PSU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: PIC18F8722, PIC18F87J11
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87J11 FAMILY
REGISTER 24-9:
TABLE 24-3:
DS39778D-page 324
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3-1
bit 0
Note 1:
RCON
WDTCON
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Watchdog Timer.
REGSLP
Name
R/W-0
This bit has no effect if the Configuration bit, WDTEN, is enabled.
REGSLP LVDSTAT
REGSLP: Voltage Regulator Low-Power Operation Enable bit
1 = On-chip regulator enters low-power operation when device enters Sleep mode
0 = On-chip regulator is active, even in Sleep mode
LVDSTAT: LVD Status bit
1 = V
0 = V
Unimplemented: Read as ‘0’
ADSHR: Shared Address SFR Select bit
For details of bit operation, see Register 5-3.
Unimplemented: Read as ‘0’
SWDTEN: Software Controlled Watchdog Timer Enable bit
1 = Watchdog Timer is on
0 = Watchdog Timer is off
IPEN
Bit 7
LVDSTAT
SUMMARY OF WATCHDOG TIMER REGISTERS
R-x
DDCORE
DDCORE
WDTCON: WATCHDOG TIMER CONTROL REGISTER
Bit 6
—
> 2.45V
< 2.45V
W = Writable bit
‘1’ = Bit is set
U-0
—
Bit 5
CM
—
ADSHR
ADSHR
R/W-0
Bit 4
RI
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
Bit 3
TO
—
U-0
—
Bit 2
PD
—
(1)
U-0
—
Bit 1
POR
—
© 2009 Microchip Technology Inc.
x = Bit is unknown
SWDTEN
U-0
Bit 0
BOR
—
Reset Values
SWDTEN
on Page:
U-0
58
59
bit 0
(1)