DV164136 Microchip Technology, DV164136 Datasheet - Page 129

• Manufacturer Part Number: DV164136
• Description: DEVELOPMENT KIT FOR PIC18
• Manufacturer: Microchip Technology
• Series: PIC®r
• Type: MCUr

Specifications of DV164136

• Contents: Board, Cables, CDs, PICkit™ 3 Programmer, Power Supply
• Processor To Be Evaluated: PIC18F8722, PIC18F87J11
• Interface Type: RS-232, USB
• Operating Supply Voltage: 3.3 V, 5 V
• Silicon Manufacturer: Microchip
• Core Architecture: PIC
• Core Sub-architecture: PIC18
• Silicon Core Number: PIC18F
• Silicon Family Name: PIC18F8xxx
• Kit Contents: PIC18 Exp Brd PICkit 3 Cable CD PSU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: PIC18F8722, PIC18F87J11
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

10.0
Depending on the device selected and features
enabled, there are up to nine ports available. Some
pins of the I/O ports are multiplexed with an alternate
function from the peripheral features on the device. In
general, when a peripheral is enabled, that pin may not
be used as a general purpose I/O pin.
Each port has three memory-mapped registers for its
operation:
• TRIS register (Data Direction register)
• PORT register (reads the levels on the pins of the
• LAT register (Output Latch register)
Reading the PORT register reads the current status of
the pins, whereas writing to the PORT register writes to
the Output Latch (LAT) register.
Setting a TRIS bit (= 1) makes the corresponding
PORT pin an input (i.e., puts the corresponding output
driver in a high-impedance mode). Clearing a TRIS bit
(= 0) makes the corresponding PORT pin an output
(i.e., puts the contents of the corresponding LAT bit on
the selected pin).
The Output Latch (LAT register) is useful for
read-modify-write operations on the value that the I/O
pins are driving. Read-modify-write operations on the
LAT register read and write the latched output value for
the PORT register.
A simplified model of a generic I/O port, without the
interfaces to other peripherals, is shown in Figure 10-1.
FIGURE 10-1:
© 2009 Microchip Technology Inc.
device)
RD LAT
Data
Bus
WR LAT
or PORT
WR TRIS
RD TRIS
RD PORT
I/O PORTS
TRIS Latch
Data Latch
D
D
CK
CK
GENERIC I/O PORT
OPERATION
Q
Q
Q
EN
EN
D
I/O pin
Buffer
Input
(1)
PIC18F87J11 FAMILY
10.1
When developing an application, the capabilities of the
port pins must be considered. Outputs on some pins
have higher output drive strength than others. Similarly,
some pins can tolerate higher than V
10.1.1
The voltage tolerance of pins used as device inputs is
dependent on the pin’s input function. Pins that are
used as digital only inputs are able to handle DC
voltages up to 5.5V, a level typical for digital logic
circuits. In contrast, pins that also have analog input
functions of any kind (such as A/D and comparator
inputs) can only tolerate voltages up to V
excursions beyond V
avoided.
Table 10-1 summarizes the input capabilities. Refer to
Section 27.0 “Electrical Characteristics” for more
details.
TABLE 10-1:
10.1.2
When used as digital I/O, the output pin drive strengths
vary for groups of pins intended to meet the needs for
a variety of applications. In general, there are three
classes of output pins in terms of drive capability.
PORTB and PORTC, as well as PORTA<7:6>, are
designed to drive higher current loads, such as LEDs.
PORTD, PORTE and PORTJ are capable of driving
digital circuits associated with external memory
devices; they can also drive LEDs, but only those with
smaller current requirements. PORTF, PORTG and
PORTH, along with PORTA<5:0>, have the lowest
drive level, but are capable of driving normal digital
circuit loads with a high input impedance.
PORTA<7:0>
PORTC<1:0>
PORTF<6:1>
PORTH<7:4>
PORTB<7:0>
PORTC<7:2>
PORTD<7:0>
PORTE<7:0>
PORTF<7>
PORTG<4:0>
PORTH<3:0>
PORTJ<7:0>
Note 1:
Port or Pin
I/O Port Pin Capabilities
These ports are not available on 64-pin
devices.
INPUT PINS AND VOLTAGE
CONSIDERATIONS
PIN OUTPUT DRIVE
(1)
(1)
(1)
INPUT VOLTAGE LEVELS
Tolerated
Input
5.5V
V
DD
DD
on these pins should be
Only V
tolerated.
Tolerates input levels
above V
most standard logic.
DS39778D-page 129
Description
DD
DD
DD
input levels.
input levels
, useful for
DD
. Voltage