PCM18XK1 Microchip Technology, PCM18XK1 Datasheet - Page 389

MODULE PROC PIC18F8680,6680,8565

PCM18XK1

Manufacturer Part Number
PCM18XK1
Description
MODULE PROC PIC18F8680,6680,8565
Manufacturer
Microchip Technology
Datasheet

Specifications of PCM18XK1

Accessory Type
Processor Module
Lead Free Status / RoHS Status
Not applicable / Not applicable
For Use With/related Products
ICE2000
For Use With
ICE2000 - EMULATOR MPLAB-ICE 2000 POD
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
INCFSZ
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
 2004 Microchip Technology Inc.
Q Cycle Activity:
If skip:
If skip and followed by 2-word instruction:
Before Instruction
After Instruction
operation
operation
operation
Decode
PC
CNT
If CNT
If CNT
No
No
No
Q1
Q1
Q1
PC
PC
=
=
=
=
=
register ‘f’
operation
operation
operation
Increment f, skip if 0
[ label ]
0
d
a
(f) + 1
skip if result = 0
None
The contents of register ‘f’ are
incremented. If ‘d’ is ‘0’, the result
is placed in W. If ‘d’ is ‘1’, the result
is placed back in register ‘f’
(default).
If the result is ‘0’, the next instruc-
tion which is already fetched is
discarded and a NOP is executed
instead, making it a two-cycle
instruction. If ‘a’ is ‘0’, the Access
Bank will be selected, overriding
the BSR value. If ‘a’ = 1, then the
bank will be selected as per the
BSR value (default).
1
1(2)
Note: 3 cycles if skip and followed
HERE
NZERO
ZERO
Read
0011
No
No
No
Q2
Q2
Q2
Address (HERE)
CNT + 1
0;
Address (ZERO)
0;
Address (NZERO)
f
[0,1]
[0,1]
by a 2-word instruction.
255
dest,
INCFSZ
:
:
INCFSZ
11da
operation
operation
operation
Process
Data
No
No
No
Q3
Q3
Q3
ffff
f [,d [,a]]
CNT, 1, 0
destination
operation
operation
operation
Write to
PIC18F6585/8585/6680/8680
No
No
No
Q4
Q4
Q4
ffff
INFSNZ
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
If skip:
If skip and followed by 2-word instruction:
Before Instruction
After Instruction
operation
operation
operation
Decode
No
No
No
PC
REG
If REG
If REG
Q1
Q1
Q1
PC
PC
=
=
=
=
=
register ‘f’
operation
operation
operation
Increment f, skip if not 0
[ label ]
0
d
a
(f) + 1
skip if result
None
The contents of register ‘f’ are
incremented. If ‘d’ is ‘0’, the result
is placed in W. If ‘d’ is ‘1’, the result
is placed back in register ‘f’
(default).
If the result is not ‘0’, the next
instruction which is already fetched
is discarded and a NOP is executed
instead, making it a two-cycle
instruction. If ‘a’ is ‘0’, the Access
Bank will be selected, overriding
the BSR value. If ‘a’ = 1, then the
bank will be selected as per the
BSR value (default).
1
1(2)
Note: 3 cycles if skip and followed
HERE
ZERO
NZERO
Read
0100
No
No
No
Q2
Q2
Q2
Address (HERE)
REG + 1
0;
Address (NZERO)
0;
Address (ZERO)
f
[0,1]
[0,1]
255
by a 2-word instruction.
dest,
INFSNZ
INFSNZ
10da
operation
operation
operation
Process
Data
0
No
No
No
Q3
Q3
Q3
DS30491C-page 387
REG, 1, 0
ffff
f [,d [,a]]
destination
operation
operation
operation
Write to
No
No
No
Q4
Q4
Q4
ffff

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