PCM18XK1 Microchip Technology, PCM18XK1 Datasheet - Page 380

• Manufacturer Part Number: PCM18XK1
• Description: MODULE PROC PIC18F8680,6680,8565
• Manufacturer: Microchip Technology

Specifications of PCM18XK1

• Accessory Type: Processor Module
• Lead Free Status / RoHS Status: Not applicable / Not applicable
• For Use With/related Products: ICE2000
• For Use With: ICE2000 - EMULATOR MPLAB-ICE 2000 POD
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F6585/8585/6680/8680
BTFSC
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS30491C-page 378
Q Cycle Activity:
If skip:
If skip and followed by 2-word instruction:
Before Instruction
After Instruction
operation
operation
operation
Decode
PC
If FLAG<1>
If FLAG<1>
No
No
No
Q1
Q1
Q1
PC
PC
Bit Test File, Skip if Clear
[ label ] BTFSC f,b[,a]
0
0
a
skip if (f<b>) = 0
None
If bit ‘b’ in register ‘f’ is ‘0’, then the
next instruction is skipped.
If bit ‘b’ is ‘0’, then the next
instruction fetched during the current
instruction execution is discarded
and a NOP is executed instead,
making this a two-cycle instruction. If
‘a’ is ‘0’, the Access Bank will be
selected, overriding the BSR value. If
‘a’ = 1, then the bank will be selected
as per the BSR value (default).
1
1(2)
Note: 3 cycles if skip and followed
register ‘f’
HERE
FALSE
TRUE
operation
operation
operation
Read
1011
No
No
No
Q2
Q2
Q2
=
=
=
=
=
f
b
[0,1]
255
7
address (HERE)
0;
address (TRUE)
1;
address (FALSE)
by a 2-word instruction.
BTFSC
:
:
bbba
operation
operation
operation
Process
Data
No
No
No
Q3
Q3
Q3
FLAG, 1, 0
ffff
operation
operation
operation
operation
No
No
No
No
Q4
Q4
Q4
ffff
BTFSS
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
If skip:
If skip and followed by 2-word instruction:
Before Instruction
After Instruction
operation
operation
operation
Decode
PC
If FLAG<1>
If FLAG<1>
No
No
No
Q1
Q1
Q1
PC
PC
Bit Test File, Skip if Set
[ label ] BTFSS f,b[,a]
0
0
a
skip if (f<b>) = 1
None
If bit ‘b’ in register ‘f’ is ‘1’, then the
next instruction is skipped.
If bit ‘b’ is ‘1’, then the next
instruction fetched during the
current instruction execution is
discarded and a NOP is executed
instead, making this a two-cycle
instruction. If ‘a’ is ‘0’, the Access
Bank will be selected, overriding the
BSR value. If ‘a’ = 1, then the bank
will be selected as per the BSR value
(default).
1
1(2)
Note:
register ‘f’
HERE
FALSE
TRUE
operation
operation
operation
Read
1010
No
No
No
Q2
Q2
Q2
=
=
=
=
=
f
b < 7
[0,1]
 2004 Microchip Technology Inc.
255
address (HERE)
0;
address (FALSE)
1;
address (TRUE)
3 cycles if skip and followed
by a 2-word instruction.
BTFSS
:
:
bbba
operation
operation
operation
Process
Data
No
No
No
Q3
Q3
Q3
FLAG, 1, 0
ffff
operation
operation
operation
operation
No
No
No
No
Q4
Q4
Q4
ffff