S25FL128SAGMFI011 Spansion, S25FL128SAGMFI011 Datasheet - Page 139
S25FL128SAGMFI011
Manufacturer Part Number
S25FL128SAGMFI011
Description
Flash 128Mb 3V 133MHz Serial NOR Flash
Manufacturer
Spansion
Datasheet
1.S25FL128SAGNFI001.pdf
(153 pages)
Specifications of S25FL128SAGMFI011
Rohs
yes
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Quantity
Price
Part Number:
S25FL128SAGMFI011
Manufacturer:
SPANSION
Quantity:
20 000
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July 12, 2012 S25FL128S_256S_00_05
Parameter Relative
Table 11.14 CFI Alternate Vendor-Specific Extended Query Parameter 90h - HPLC(SDR) (Sheet 1 of 2)
Byte Address
Offset
0Ah
0Bh
0Ch
0Dh
0Eh
1Ah
1Bh
1Ch
1Dh
1Eh
2Ah
2Bh
2Ch
2Dh
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Fh
20h
21h
22h
23h
24h
25h
26h
27h
28h
29h
D a t a
Data
3Ch
BBh
BCh
EBh
ECh
90h
56h
06h
0Eh
46h
43h
03h
13h
0Bh
0Ch
3Bh
6Bh
6Ch
32h
03h
00h
00h
00h
00h
00h
00h
00h
00h
00h
04h
02h
01h
50h
00h
FFh
FFh
00h
08h
00h
08h
00h
08h
00h
04h
02h
04h
S25FL128S and S25FL256S
S h e e t
Parameter ID (Latency Code Table)
Parameter Length (The number of following bytes in this parameter. Adding this value to the
current location value +1 = the first byte of the next parameter)
Number of rows
Row length in bytes
Start of header (row 1), ASCII “F” for frequency column header
ASCII “C” for Code column header
Read 3-byte address instruction
Read 4-byte address instruction
Read Fast 3-byte address instruction
Read Fast 4-byte address instruction
Read Dual Out 3-byte address instruction
Read Dual Out 4-byte address instruction
Read Quad Out 3-byte address instruction
Read Quad Out 4-byte address instruction
Dual I/O Read 3-byte address instruction
Dual I/O Read 4-byte address instruction
Quad I/O Read 3-byte address instruction
Quad I/O Read 4-byte address instruction
Start of row 2, SCK frequency limit for this row (50 MHz)
Latency Code for this row (11b)
Read mode cycles
Read latency cycles
Read Fast mode cycles
Read Fast latency cycles
Read Dual Out mode cycles
Read Dual Out latency cycles
Read Quad Out mode cycles
Read Quad Out latency cycles
Dual I/O Read mode cycles
Dual I/O Read latency cycles
Quad I/O Read mode cycles
Quad I/O Read latency cycles
Start of row 3, SCK frequency limit for this row (80 MHz)
Latency Code for this row (00b)
Read mode cycles (FFh = command not supported at this frequency)
Read latency cycles
Read Fast mode cycles
Read Fast latency cycles
Read Dual Out mode cycles
Read Dual Out latency cycles
Read Quad Out mode cycles
Read Quad Out latency cycles
Dual I/O Read mode cycles
Dual I/O Read latency cycles
Quad I/O Read mode cycles
Quad I/O Read latency cycles
Description
139
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