S25FL128SAGMFI011 Spansion, S25FL128SAGMFI011 Datasheet - Page 112
S25FL128SAGMFI011
Manufacturer Part Number
S25FL128SAGMFI011
Description
Flash 128Mb 3V 133MHz Serial NOR Flash
Manufacturer
Spansion
Datasheet
1.S25FL128SAGNFI001.pdf
(153 pages)
Specifications of S25FL128SAGMFI011
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10.5.3
Quad Page Program (QPP 32h or 38h, or 4QPP 34h)
The Quad-input Page Program (QPP) command allows bytes to be programmed in the memory (changing
bits from 1 to 0). The Quad-input Page Program (QPP) command allows up to a page size (either 256 or 512
bytes) of data to be loaded into the Page Buffer using four signals: IO0-IO3. QPP can improve performance
for PROM Programmer and applications that have slower clock speeds (< 12 MHz) by loading 4 bits of data
per clock cycle. Systems with faster clock speeds do not realize as much benefit for the QPP command since
the inherent page program time becomes greater than the time it takes to clock-in the data. The maximum
frequency for the QPP command is 80 MHz.
To use Quad Page Program the Quad Enable Bit in the Configuration Register must be set (QUAD=1). A
Write Enable command must be executed before the device will accept the QPP command (Status Register-
1, WEL=1).
The instruction
32h (ExtAdd=0) is followed by a 3-byte address (A23-A0) or
32h (ExtAdd=1) is followed by a 4-byte address (A31-A0) or
38h (ExtAdd=0) is followed by a 3-byte address (A23-A0) or
38h (ExtAdd=1) is followed by a 4-byte address (A31-A0) or
34h is followed by a 4-byte address (A31-A0)
and at least one data byte, into the IO signals. Data must be programmed at previously erased (FFh) memory
locations.
QPP requires programming to be done one full page at a time. While less than a full page of data may be
loaded for programming, the entire page is considered programmed, any locations not filled with data will be
left as ones, the same page must not be programmed more than once.
All other functions of QPP are identical to Page Program. The QPP command sequence is shown in the
figure below.
*MSB
CS#
CS#
SCK
IO0
SCK
IO1
IO2
IO3
IO0
IO1
IO2
IO3
Figure 10.55 Quad 512-byte Page Program Command Sequence (3-byte Address, 32h or 38h)
Byte 5
7
5
6
*
40
4
0
0
1
2
3
41
1
6
7
Byte 6
4
5
*
42
2
0
1
2
3
Instruction
43
3
*
Byte 7
7
5
6
4
S25FL128S and S25FL256S
44
4
0
1
2
3
45
5
*
Byte 8
5
6
7
4
46
6
3
0
1
2
47
7
Byte 9
7
D a t a
5
6
*
48
4
23
*
8
0
1
2
3
49
22
9
Byte 10 Byte 11
5
6
7
*
50
4
21
10
Address
3
24-Bit
0
1
2
S h e e t
51
28
*
3
6
7
52
5
4
29
2
53
0
1
2
3
Byte 12
1
*
30
54
5
6
7
4
31
0
3
55
0
1
2
Byte 1
32
6
7
4
5
*
Byte 509
S25FL128S_256S_00_05 July 12, 2012
5
6
7
*
4
33
0
1
2
3
3
0
1
2
34
6
7
Byte 2
5
4
*
Byte 510Byte 511
7
*
5
6
4
35
0
1
2
3
0
1
2
3
36
Byte 3
5
6
6
7
4
*
*
5
6
7
4
37
3
0
1
2
2
3
0
1
38
6
7
Byte 4
5
4
*
Byte 512
7
*
5
6
4
39
0
1
2
3
0
1
2
3
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