EVAL-ADUC836QS AD [Analog Devices], EVAL-ADUC836QS Datasheet - Page 6

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EVAL-ADUC836QS

Manufacturer Part Number
EVAL-ADUC836QS
Description
MicroConverter, Dual 16-Bit ADCs with Embedded 62 kB Flash MCU
Manufacturer
AD [Analog Devices]
Datasheet
ADuC836
SPECIFICATIONS
Parameter
LOGIC OUTPUTS (Not Including XTAL2)
POWER SUPPLY MONITOR (PSM)
WATCHDOG TIMER (WDT)
MCU CORE CLOCK RATE
START-UP TIME
FLASH/EE MEMORY RELIABILITY CHARACTERISTICS
V
V
Timeout Period
AV
AV
At Power-On
After External RESET in Normal Mode
After WDT Reset in Normal Mode
Floating State Leakage Current
Floating State Output Capacitance
DV
DV
MCU Clock Rate
From Idle Mode
From Power-Down Mode
Endurance
Data Retention
OH
OL
Oscillator Running
Oscillator Powered Down
DD
DD
DD
DD
, Output Low Voltage
, Output High Voltage
Wake-Up with
Wake-Up with SPI Interrupt
Wake-Up with TIC Interrupt
Wake-Up with External RESET
Wake-Up with
Wake-Up with SPI Interrupt
Wake-Up with External RESET
Trip Point Selection Range
Power Supply Trip Point Accuracy
Trip Point Selection Range
Power Supply Trip Point Accuracy
16
17
2
14
(continued)
Interrupt
Interrupt
2
2
ADuC836
2.4
2.4
0.4
0.4
0.4
±10
5
2.63
4.63
±3.0
±4.0
2.63
4.63
±3.0
±4.0
0
2000
98.3
12.58
300
3
3
10
20
20
20
3
20
20
5
100,000
100
15
–6–
Test Conditions/Comments
V
V
I
I
I
Four Trip Points Selectable in This Range
Programmed via TPA1–0 in PSMCON
T
T
Four Trip Points Selectable in This Range
Programmed via TPD1–0 in PSMCON
T
T
Nine Timeout Periods in This Range
Programmed via PRE3–0 in WDCON
Clock Rate Generated via On-Chip PLL
Programmable via CD2–0 Bits in
PLLCON SFR
Controlled via WDCON SFR
OSC_PD Bit = 0 in PLLCON SFR
OSC_PD Bit = 1 in PLLCON SFR
SINK
SINK
SINK
DD
DD
MAX
MAX
MAX
MAX
= 5 V, I
= 3 V, I
= 8 mA, SCLOCK, MOSI/SDATA
= 10 mA, P1.0 and P1.1
= 1.6 mA, All Other Outputs
= 85°C
= 125°C
= 85 C
= 125 C
SOURCE
SOURCE
= 80 A
= 20 A
Unit
V min
V min
V max
V max
V max
pF typ
V min
V max
% max
% max
V min
V max
% max
% max
ms min
ms max
kHz min
MHz max
ms typ
ms typ
ms typ
ms typ
ms typ
Cycles min
Years min
A max
s typ
s typ
s typ
s typ
s typ
s typ
REV. 0

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