EVAL-ADUC836QS AD [Analog Devices], EVAL-ADUC836QS Datasheet - Page 36

• Manufacturer Part Number: EVAL-ADUC836QS
• Description: MicroConverter, Dual 16-Bit ADCs with Embedded 62 kB Flash MCU
• Manufacturer: AD [Analog Devices]

PULSEWIDTH MODULATOR (PWM)
The PWM on the ADuC836 is a highly fl exible PWM offering
programmable resolution and input clock, and can be con fi g ured
for any one of six different modes of operation. Two of these modes
allow the PWM to be confi gured as a - DAC with up to 16 bits
of resolution. A block diagram of the PWM is shown in Figure 26.
ADuC836
32.768kHz/15
12.583MHz
32.768kHz
PWM
CLK
Figure 26. PWM Block Diagram
Bit
7
6
5
4
3
2
1
0
SELECT
CLOCK
Name
–––
MD2
MD1
MD0
CDIV1
CDIV0
CSEL1
CSEL0
16-BIT PWM COUNTER
PROGRAMMABLE
COMPARE
DIVIDER
Description
Reserved for Future Use
PWM Mode Bits
The MD2/1/0 bits choose the PWM mode as fol lows:
MD2
0
0
0
0
1
1
1
1
PWM Clock Divider.
Scale the clock source for the PWM counter as follows:
CDIV1 CDIV0
0
0
1
1
PWM Clock Divider.
Select the clock source for the PWM as follows:
CSEL1 CSEL0
0
0
1
1
Table XVI. PWMCON SFR Bit Designations
MD1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
P1.0
P1.1
MD0
0
1
0
1
0
1
0
1
Description
PWM Counter = Selected Clock/1
PWM Counter = Selected Clock 4
PWM Counter = Selected Clock/16
PWM Counter = Selected Clock/64
Description
PWM Clock = f
PWM Clock = f
PWM Clock = External Input at P3.4/T0/PWMCLK
PWM Clock = f
–36–
The PWM uses fi ve SFRs: the control SFR, PWMCON, and
four data SFRs: PWM0H, PWM0L, PWM1H, and PWM1L.
PWMCON (as described in Table XVI) controls the different
modes of operation of the PWM as well as the PWM clock fre-
quency. PWM0H/L and PWM1H/L are the data registers that
de ter mine the duty cycles of the PWM outputs at P1.0 and P1.1.
To use the PWM user software, fi rst write to PWMCON to select
the PWM mode of operation and the PWM input clock. Writing
to PWMCON also resets the PWM counter. In any of the 16-bit
modes of operation (modes 1, 3, 4, 6), user software should write
to the PWM0L or PWM1L SFRs fi rst. This value is written to a
hidden SFR. Writing to the PWM0H or PWM1H SFRs updates
both the PWMxH and the PWMxL SFRs but does not change
the outputs until the end of the PWM cycle in progress. The
values written to these 16-bit reg is ters are then used in the next
PWM cycle.
PWMCON
SFR Address
Power-On Default Value
Bit Addressable
Mode
Mode 0: PWM Disabled
Mode 1: Single Variable Resolution PWM
Mode 2: Twin 8-bit PWM
Mode 3: Twin 16-bit PWM
Mode 4: Dual NRZ 16-bit - DAC
Mode 5: Dual 8-bit PWM
Mode 6: Dual RZ 16-bit - DAC
Reserved for Future Use
XTAL
XTAL
VCO
(12.58 MHz)
/15
PWM Control SFR
AEH
00H
No
REV. 0