EVAL-ADUC836QS AD [Analog Devices], EVAL-ADUC836QS Datasheet - Page 51

• Manufacturer Part Number: EVAL-ADUC836QS
• Description: MicroConverter, Dual 16-Bit ADCs with Embedded 62 kB Flash MCU
• Manufacturer: AD [Analog Devices]

Notice also that direct access to the SCLOCK and SDATA/MOSI
pins is afforded through the SFR interface in I
Therefore, if you are not using the SPI or I
use these two pins to provide additional high current digital outputs.
REV. 0
Figure 44. SDATA/MOSI Pin I/O Functional Equiv a lent
in SPI Mode
Figure 45. SDATA/MOSI Pin I/O Functional Equiv a lent
in I
BITS
SFR
SPE = 0 (I
(MASTER/SLAVE)
MDO
HARDWARE SPI
MDE
I2CM
Figure 42. SCLOCK Pin I/O Functional Equivalent
in SPI Mode
Figure 43. SCLOCK Pin I/O Functional Equivalent
in I
MDI
2
(MASTER/SLAVE)
HARDWARE SPI
C Mode
HARDWARE I
(SLAVE ONLY)
SPE = 0 (I
2
HARDWARE I
(SLAVE ONLY)
MCO
I
C Mode
BITS
SFR
SPE = 1 (SPI ENABLE)
2
CM
2
C ENABLE)
SPE = 1 (SPI ENABLE)
2
C ENABLE)
REJECTION FILTER
2
REJECTION FILTER
C
2
50ns GLITCH
C
50ns GLITCH
SCHMITT
TRIGGER
Q1
Q3
Q1
Q3
DV
DV
DV
DD
Q1
(OFF)
Q3
DD
2
DD
C func tions, you can
Q2 (OFF)
Q4 (OFF)
Q2 (OFF)
Q4 (OFF)
2
C mas ter mode.
Q2
Q4
DV
Q1
(OFF)
Q3
SCLOCK
DD
PIN
SDATA/
Q2
Q4
SCLOCK
MOSI
PIN
PIN
SDATA/
MOSI
PIN
–51–
As shown in Figure 46, the MISO pin in SPI master/slave op er a-
tion offers the exact same pull-up and pull-down con fi g u ra tion as
the MOSI pin in SPI slave/master operation.
The
prevent the
overdriven by an external device to drive the
Read-Modify-Write Instructions
Some 8051 instructions that read a port, read the latch and
others read the pin. The instructions that read the latch rather
than the pins are the ones that read a value, possibly change it,
and then rewrite it to the latch. These are called “read-modify-
write” instructions. which are listed below. When the destination
operand is a port or a port bit, these instructions read the latch
rather than the pin.
ANL
ORL
XRL
JBC
CPL
INC
DEC
DJNZ
MOV PX.Y, C* (Move Carry to Bit Y of Port X)
CLR PX.Y*
SETB PX.Y*
*These instructions read the port byte (all eight bytes), modify the addressed bit
The reason that read-modify-write instructions are directed to
the latch rather than to the pin is to avoid a possible mis in ter -
pre ta tion of the voltage level of a pin. For example, a port pin
might be used to drive the base of a transistor. When a 1 is written
to the bit, the transistor is turned on. If the CPU then reads the
same port bit at the pin rather than the latch, it will read the base
voltage of the transistor and interpret it as a Logic 0. Read ing the
latch rather than the pin will return the correct value of 1.
and then write the new byte back to the latch.
Figure 46. MISO Pin I/O Functional Equivalent
pin has a weak internal pull-up permanently enabled to
Figure 47.
input from fl oating. This pull-up can be easily
(MASTER/SLAVE)
(MASTER/SLAVE)
HARDWARE SPI
HARDWARE SPI
(Logical AND, e.g., ANL P1, A)
(Logical OR, e.g., ORL P2, A)
(Logical EX-OR, e.g., XRL P3, A)
(Jump If Bit = 1 and Clear Bit,
e.g., JBC P1.1, LABEL
(Complement Bit, e.g., CPL P3.0)
(Increment, e.g., INC P2)
(Decrement, e.g., DEC P2)
(Decrement and Jump IFf Not Zero,
e.g.,DJNZ P3, LABEL)
(Clear Bit Y of Port X)
(Set Bit Y of Port X)
Pin I/O Functional Equivalent
DV
DV
DD
DD
MISO
PIN
PIN
ADuC836
pin low.