EVAL-ADUC836QS AD [Analog Devices], EVAL-ADUC836QS Datasheet - Page 59

• Manufacturer Part Number: EVAL-ADUC836QS
• Description: MicroConverter, Dual 16-Bit ADCs with Embedded 62 kB Flash MCU
• Manufacturer: AD [Analog Devices]

BAUD RATE GENERATION USING TIMER 1 AND TIM ER 2
Timer 1 Generated Baud Rates
When Timer 1 is used as the baud rate generator, the baud rates
in Modes 1 and 3 are determined by the Timer 1 overfl ow rate
and the value of SMOD as follows:
The Timer 1 interrupt should be disabled in this application.
The timer itself can be confi gured for either timer or counter
operation, and in any of its three running modes. In the most
typical application, it is confi gured for timer operation, in the
Autoreload mode (high nibble of TMOD = 0100 binary). In this
case, the baud rate is given by the formula:
A very low baud rate can also be achieved with Timer 1 by leav ing
the Timer 1 interrupt enabled, confi guring the timer to run as a
16-bit timer (high nibble of TMOD = 0100 binary), and using
the Timer 1 interrupt to do a 16-bit software reload. Table XXXI
shows some commonly used baud rates and how they might
be calculated from a core clock frequency of 1.5728 MHz and
12.58 MHz using Timer 1. Generally speak ing, a 5% error is
tolerable using asynchronous (start/stop) com mu ni ca tions.
Ideal
Baud
9600
1600
1200
1200
REV. 0
Modes 1
Mode 1
Table XXXI. Commonly Used Baud Rates, Timer 1
and Baud Rate
Core
CLK
12.58
12.58
12.58
1.57
and Mode Baud Rate
3
OSC. FREQ. IS DIVIDED BY 2, NOT 12.
NOTE AVAILABILITY OF ADDITIONAL
EXTERNAL INTERRUPT
*THE CORE CLOCK IS THE OUTPUT OF THE PLL (SEE THE ON-CHIP PLL SECTION)
TRANSITION
T2EX
SMOD
Value
1
1
1
1
DETECTOR
PIN
PIN
CORE
CLK*
T2
3
=
(
2
SMOD
TH1-Reload
Value
–7 (F9H)
–27 (E5H)
–55 (C9H)
–7 (F9H)
2
⁄
32
=
C/
C/
)
32 12 256
×
= 0
= 1
EXEN2
2
(
×
Timer Overflow Rate
SMOD
CONTROL
CONTROL
Figure 56. Timer 2, UART Baud Rates
Actual
9362
1627
1192
1170
(
Baud
TR2
1
×
f
CORE
−
EXF 2
TH
1
%
Er ror
2.5
1.1
0.7
2.5
)
RCAP2L
(8 BITS)
TL2
TIMER 2
INTERRUPT
)
–59–
RCAP2H
(8 BITS)
Timer 2 Generated Baud Rates
Baud rates can also be generated using Timer 2. Using Timer 2 is
similar to using Timer 1 in that the timer must overfl ow 16 times
before a bit is transmitted/received. Because Timer 2 has a 16-bit
Autoreload mode, a wider range of baud rates is pos si ble.
Therefore when Timer 2 is used to generate baud rates, the timer
increments every two clock cycles and not every core machine
cycle as before. Thus, it increments six times faster than Timer 1,
and therefore baud rates six times faster are pos si ble. Because
Timer 2 has a 16-bit autoreload capability, very low baud rates
are still possible.
Timer 2 is selected as the baud rate generator by setting the TCLK
and/or RCLK in T2CON. The baud rates for transmit and receive
can be simultaneously different. Setting RCLK and/or TCLK puts
Timer 2 into its baud rate generator mode, as shown in Figure 56.
In this case, the baud rate is given by the formula:
Table XXXII shows some commonly used baud rates and
how they might be calculated from a core clock frequency of
1.5728 MHz and 12.5829 MHz using Timer 2.
Ideal
Baud
19200
9600
1600
1200
9600
1600
1200
TH2
Mode 1
Mode 1
Table XXXII. Commonly Used Baud Rates, Timer 2
RELOAD
OVERFLOW
and Mode Baud Rate
TIMER 2
and Mode Baud Rate
Core
CLK
12.58
12.58
12.58
12.58
1.57
1.57
1.57
3
3
RCAP2H
Value
–1 (FFH)
–1 (FFH)
–1 (FFH)
–2 (FEH)
–1 (FFH)
–1 (FFH)
–1 (FFH)
1
1
OVERFLOW
2
TIMER 1
0
0
0
1
=
RCLK
TCLK
(
RCAP2L
Value
–20 (ECH)
–41 (D7H)
–164 (5CH) 2398
–72 (B8H)
–5 (FBH)
–20 (ECH)
–41 (D7H)
1 16
=
16
16
32
SMOD
)
×
×
(
(
RX
CLOCK
TX
CLOCK
Timer Overflow Rate
65536
ADuC836
Actual
Baud
19661
9591
1199
9830
1658
1199
f
CORE
2
−
RCAP H L
2
%
Er ror
2.4
0.1
0.1
0.1
2.4
2.4
0.1
)
)