EVAL-ADUC836QS AD [Analog Devices], EVAL-ADUC836QS Datasheet - Page 56

• Manufacturer Part Number: EVAL-ADUC836QS
• Description: MicroConverter, Dual 16-Bit ADCs with Embedded 62 kB Flash MCU
• Manufacturer: AD [Analog Devices]

T2CON
SFR Address
Power-On Default Value
Bit Addressable
Bit
7
6
5
4
3
2
1
0
Timer/Counter 2 Data Registers
Timer/Counter 2 also has two pairs of 8-bit data registers as so ci at ed with it. These are used as both timer data reg is ters and timer
cap ture/reload registers.
TH2 and TL2
Timer 2, data high byte and low byte.
SFR Address = CDH, CCH, respectively.
RCAP2H and RCAP2L
Timer 2, Capture/Reload byte and low byte.
SFR Address = CBH, CAH, respectively.
ADuC836
Name
TF2
EXF2
RCLK
TCLK
EXEN2
TR2
CNT2
CAP2
Description
Timer 2 Overfl ow Flag.
Set by hardware on a Timer 2 overfl ow. TF2 will not be set when either RCLK or TCLK = 1.
Cleared by user software.
Timer 2 External Flag.
Set by hardware when either a capture or a reload is caused by a negative transition in T2EX and EXEN2 = 1.
Cleared by user software.
Receive Clock Enable Bit.
Set by user to enable the serial port to use Timer 2 overfl ow pulses for its receive clock in serial port Modes 1 and 3.
Cleared by user to enable Timer 1 overfl ow to be used for the receive clock.
Transmit Clock Enable Bit.
Set by user to enable the serial port to use Timer 2 overfl ow pulses for its transmit clock in serial port Modes 1 and 3.
Cleared by user to enable Timer 1 over fl ow to be used for the trans mit clock.
Tim er 2 External Enable Flag.
Set by user to enable a capture or reload to occur as a result of a negative transition on T2EX if Timer 2 is not
being used to clock the serial port.
Cleared by user for Timer 2 to ignore events at T2EX.
Timer 2 Start/Stop Control Bit.
Set by user to start Timer 2.
Cleared by user to stop Timer 2.
Timer 2 Timer or Counter Function Select Bit.
Set by user to select counter function (input from external T2 pin).
Cleared by user to select timer function (input from on-chip core clock).
Timer 2 Capture/Reload Select Bit.
Set by user to enable captures on negative transitions in T2EX when EXEN2 = 1.
Cleared by user to enable auto reloads with Timer 2 overfl ows or negative transitions in T2EX when EXEN2 = 1.
When either RCLK = 1 or TCLK = 1, this bit is ignored and the timer is forced to autoreload on Timer 2 overfl ow.
Timer/Counter 2 Control Register
C8H
00H
Yes
Table XXIX. T2CON SFR Bit Designations
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